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dsPIC33FJ64MC506-I
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Microchip Tech Digital Signal Processors (DSP/DSC), TQFP-64(10x10). Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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dsPIC33FJ64MC506-I
Microchip Tech · Digital Signal Processors (DSP/DSC) · TQFP-64(10x10)
dsPIC33FJ64MC506-I from Microchip Tech, in a TQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PGEC2 | bidirectional | Programming/debugging clock input; alternate functions: SOSCO (secondary oscillator output), T1CK (timer 1 external clock), CN0 (change notification input), and RC14 (port C bit 14 I/O). |
| 2 | PGED2 | bidirectional | Programming/debugging data I/O; alternate functions: SOSCI (secondary oscillator input), T4CK (timer 4 external clock), CN1 (change notification input), and RC13 (port C bit 13 I/O). |
| 3 | OC1 | bidirectional | Output compare 1 output; alternate function: RD0 (port D bit 0 I/O). |
| 4 | IC4 | input | Input capture 4 input; alternate functions: INT4 (external interrupt 4 input) and RD11 (port D bit 11 I/O). |
| 5 | IC2 | input | Input capture 2 input; alternate functions: U1CTS (UART1 clear-to-send input), FLTB (PWM fault B input), INT2 (external interrupt 2 input), and RD9 (port D bit 9 I/O). |
| 6 | IC1 | input | Input capture 1 input; alternate functions: FLTA (PWM fault A input), INT1 (external interrupt 1 input), and RD8 (port D bit 8 I/O). |
| 7 | VSS | power_in | Ground reference for logic and I/O pins. |
| 8 | OSC2 | bidirectional | Oscillator crystal output in crystal oscillator mode; alternate functions: CLKO (clock output in RC/EC modes) and RC15 (port C bit 15 I/O). |
| 9 | OSC1 | input | Oscillator crystal input in crystal oscillator mode; alternate functions: CLKIN (external clock source input) and RC12 (port C bit 12 I/O). |
| 10 | VDD | power_in | Positive supply (3.3V) for peripheral logic and I/O pins. |
| 11 | SCL1 | bidirectional | I2C1 serial clock line; alternate function: RG2 (port G bit 2 I/O). |
| 12 | U1RTS | bidirectional | UART1 request-to-send output; alternate functions: SCK1 (SPI1 serial clock), INT0 (external interrupt 0 input), and RF6 (port F bit 6 I/O). |
| 13 | U1RX | input | UART1 receive input; alternate functions: SDI1 (SPI1 data input) and RF2 (port F bit 2 I/O). |
| 14 | U1TX | bidirectional | UART1 transmit output; alternate functions: SDO1 (SPI1 data output) and RF3 (port F bit 3 I/O). |
| 15 | PWM3H | bidirectional | PWM3 high-side output; alternate function: RE5 (port E bit 5 I/O). |
| 16 | PWM4L | bidirectional | PWM4 low-side output; alternate function: RE6 (port E bit 6 I/O). |
| 17 | PWM4H | bidirectional | PWM4 high-side output; alternate function: RE7 (port E bit 7 I/O). |
| 18 | SCK2 | bidirectional | SPI2 serial clock; alternate functions: CN8 (change notification input) and RG6 (port G bit 6 I/O). |
| 19 | SDI2 | input | SPI2 data input; alternate functions: CN9 (change notification input) and RG7 (port G bit 7 I/O). |
| 20 | SDO2 | bidirectional | SPI2 data output; alternate functions: CN10 (change notification input) and RG8 (port G bit 8 I/O). |
| 21 | MCLR | input | Master clear (reset) input, active low; used for device reset and in-circuit programming. |
| 22 | VSS | power_in | Ground reference for logic and I/O pins. |
| 23 | VDD | power_in | Positive supply (3.3V) for peripheral logic and I/O pins. |
| 24 | AN3 | bidirectional | Analog input 3; alternate functions: INDX (Quadrature encoder index pulse input), CN5 (change notification input), and RB3 (port B bit 3 I/O). |
| 25 | AN2 | bidirectional | Analog input 2; alternate functions: SS1 (SPI1 slave select input), CN4 (change notification input), and RB2 (port B bit 2 I/O). |
| 26 | PGEC3 | bidirectional | Programming/debugging clock input; alternate functions: AN1 (analog input 1), VREF- (analog voltage reference minus), CN3 (change notification input), and RB1 (port B bit 1 I/O). |
| 27 | PGED3 | bidirectional | Programming/debugging data I/O; alternate functions: AN0 (analog input 0), VREF+ (analog voltage reference plus), CN2 (change notification input), and RB0 (port B bit 0 I/O). |
| 28 | PWM3L | bidirectional | PWM3 low-side output; alternate function: RE4 (port E bit 4 I/O). |
| 29 | PWM2H | bidirectional | PWM2 high-side output; alternate function: RE3 (port E bit 3 I/O). |
| 30 | PWM2L | bidirectional | PWM2 low-side output; alternate function: RE2 (port E bit 2 I/O). |
| 31 | V | power_in | Unclear designation in diagram (shown as 'V' only); likely truncated label for VSS, VDD, or power pin; requires verification. |
| 32 | OC8 | bidirectional | Output compare 8 output; alternate functions: UPDN (Quadrature encoder up/down counter direction state output), CN16 (change notification input), and RD7 (port D bit 7 I/O). |
| 33 | VCAP/VDDCORE | passive | Internal voltage regulator filter capacitor connection; connect low-ESR (< 5 ohms) capacitor of 4.7-10 µF to ground. |
| 34 | PWM1H | bidirectional | PWM1 high-side output; alternate function: RE1 (port E bit 1 I/O). |
| 35 | PWM1L | bidirectional | PWM1 low-side output; alternate function: RE0 (port E bit 0 I/O). |
| 36 | C1TX | bidirectional | ECAN1 bus transmit output; alternate function: RF1 (port F bit 1 I/O). |
| 37 | OC3 | bidirectional | Output compare 3 output; alternate function: RD2 (port D bit 2 I/O). |
| 38 | OC2 | bidirectional | Output compare 2 output; alternate function: RD1 (port D bit 1 I/O). |
| 39 | PGEC1 | bidirectional | Programming/debugging clock input; alternate functions: AN6 (analog input 6), OCFA (output compare fault A input), and RB6 (port B bit 6 I/O). |
| 40 | PGED1 | bidirectional | Programming/debugging data I/O; alternate functions: AN7 (analog input 7) and RB7 (port B bit 7 I/O). |
| 41 | AVDD | power_in | Positive supply for analog modules; must be connected at all times. |
| 42 | AVSS | power_in | Ground reference for analog modules. |
| 43 | U2CTS | input | UART2 clear-to-send input; alternate functions: AN8 (analog input 8) and RB8 (port B bit 8 I/O). |
| 44 | AN9 | bidirectional | Analog input 9; alternate function: RB9 (port B bit 9 I/O). |
| 45 | TMS | input | JTAG test mode select input; alternate functions: AN10 (analog input 10) and RB10 (port B bit 10 I/O). |
| 46 | TDO | output | JTAG test data output; alternate functions: AN11 (analog input 11) and RB11 (port B bit 11 I/O). |
| 47 | VSS | power_in | Ground reference for logic and I/O pins. |
| 48 | VDD | power_in | Positive supply (3.3V) for peripheral logic and I/O pins. |
| 49 | TCK | input | JTAG test clock input; alternate functions: AN12 (analog input 12) and RB12 (port B bit 12 I/O). |
| 50 | TDI | input | JTAG test data input; alternate functions: AN13 (analog input 13) and RB13 (port B bit 13 I/O). |
| 51 | U2RTS | bidirectional | UART2 request-to-send output; alternate functions: AN14 (analog input 14) and RB14 (port B bit 14 I/O). |
| 52 | AN15 | input | Analog input 15; alternate functions: OCFB (output compare fault B input), CN12 (change notification input), and RB15 (port B bit 15 I/O). |
| 53 | U2RX | input | UART2 receive input (dedicated pin with no general-purpose I/O alternate function). |
| 54 | U2TX | bidirectional | UART2 transmit output; alternate functions: SCL2 (I2C2 serial clock), CN18 (change notification input), and RF5 (port F bit 5 I/O). |
| 55 | SDA2 | bidirectional | I2C2 serial data line; alternate functions: CN17 (change notification input) and RF4 (port F bit 4 I/O). |
| 56 | SDA1 | bidirectional | I2C1 serial data line; alternate function: RG3 (port G bit 3 I/O). |
| 57 | SS2 | bidirectional | SPI2 slave select input; alternate functions: CN11 (change notification input) and RG9 (port G bit 9 I/O). |
| 58 | AN5 | input | Analog input 5; alternate functions: QEB (Quadrature encoder phase B input), IC8 (input capture 8 input), CN7 (change notification input), and RB5 (port B bit 5 I/O). |
| 59 | AN4 | input | Analog input 4; alternate functions: QEA (Quadrature encoder phase A input), IC7 (input capture 7 input), CN6 (change notification input), and RB4 (port B bit 4 I/O). |
| 60 | IC3 | input | Input capture 3 input; alternate functions: INT3 (external interrupt 3 input) and RD10 (port D bit 10 I/O). |
| 61 | VDD | power_in | Positive supply (3.3V) for peripheral logic and I/O pins. |
| 62 | C1RX | input | ECAN1 bus receive input; alternate function: RF0 (port F bit 0 I/O). |
| 63 | OC7 | bidirectional | Output compare 7 output; alternate functions: CN15 (change notification input) and RD6 (port D bit 6 I/O). |
| 64 | OC6 | bidirectional | Output compare 6 output; alternate functions: IC6 (input capture 6 input), CN14 (change notification input), and RD5 (port D bit 5 I/O). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Ambient temperature under bias | -40 | 85 | °C | 275 | |||
| Storage temperature | -65 | 150 | °C | 275 | |||
| Voltage on VDD with respect to VSS | -0.3 | 4 | V | 275 | |||
| Voltage on any combined analog and digital pin and MCLR, with respect to VSS | -0.3 | V | 275 | ||||
| Voltage on any digital-only pin with respect to VSS | -0.3 | 5.6 | V | 275 | |||
| Voltage on VCAP/VDDCORE with respect to VSS | 2.25 | 2.75 | V | 275 | |||
| Maximum output current sunk by any I/O pin | 4 | mA | 275 | ||||
| Maximum output current sourced by any I/O pin | 4 | mA | 275 | ||||
| Operating Junction Temperature Range | TJ | -40 | 125 | °C | 276 | ||
| Operating Ambient Temperature Range | TA | -40 | 85 | °C | 276 | ||
| Maximum operating speed (DC5) | 40 | MIPS | VDD 3.0-3.6V, -40°C to +85°C | 276 | |||
| Supply Voltage (DC10) | VDD | 3 | 3.6 | V | 277 | ||
| RAM Data Retention Voltage (DC12) | VDR | 1.8 | V | 277 | |||
| VDD Rise Rate (DC17) | SVDD | 0.03 | V/ms | 0-3.0V in 0.1s | 277 | ||
| VDD Core internal regulator voltage (DC18) | VCORE | 2.25 | 2.75 | V | Voltage is dependent on load, temperature and VDD | 277 | |
| External Filter Capacitor Value (CEFC) | CEFC | 4.7 | 10 | μF | Capacitor must be low series resistance (< 5 ohms) | 283 | |
| BOR event on VDD transition high-to-low (BO10) | VBOR | 2.4 | 2.55 | V | BOR event is tied to VDD core voltage decrease | 282 | |
| Output Low Voltage, I/O ports (DO10) | VOL | 0.4 | V | IOL = 2mA, VDD = 3.3V | 282 | ||
| Output High Voltage, I/O ports (DO20) | VOH | 2.4 | V | IOH = -2.3 mA, VDD = 3.3V | 282 | ||
| CNx Pull-up Current (DI30) | ICNPU | 50 | 250 | 400 | μA | VDD = 3.3V, VPIN = VSS | 281 |
| Operating Current (IDD) DC20d | IDD | 27 | 30 | mA | -40°C | 278 | |
| Operating Current (IDD) DC20a | IDD | 27 | 30 | mA | +25°C 3.3V 10 MIPS | 278 | |
| Operating Current (IDD) DC20b | IDD | 27 | 30 | mA | +85°C | 278 | |
| Operating Current (IDD) DC21d | IDD | 36 | 40 | mA | -40°C | 278 | |
| Operating Current (IDD) DC21a | IDD | 37 | 40 | mA | +25°C 3.3V 16 MIPS | 278 | |
| Operating Current (IDD) DC21b | IDD | 38 | 45 | mA | +85°C | 278 | |
| Operating Current (IDD) DC22d | IDD | 43 | 50 | mA | -40°C | 278 | |
| Operating Current (IDD) DC22a | IDD | 46 | 50 | mA | +25°C 3.3V 20 MIPS | 278 | |
| Operating Current (IDD) DC22b | IDD | 46 | 55 | mA | +85°C | 278 | |
| Operating Current (IDD) DC23d | IDD | 65 | 70 | mA | -40°C | 278 | |
| Operating Current (IDD) DC23a | IDD | 65 | 70 | mA | +25°C 3.3V 30 MIPS | 278 | |
| Operating Current (IDD) DC23b | IDD | 65 | 70 | mA | +85°C | 278 | |
| Operating Current (IDD) DC24d | IDD | 84 | 90 | mA | -40°C | 278 | |
| Operating Current (IDD) DC24a | IDD | 84 | 90 | mA | +25°C 3.3V 40 MIPS | 278 | |
| Operating Current (IDD) DC24b | IDD | 84 | 90 | mA | +85°C | 278 | |
| Idle Current (IIDLE) DC40d | IIDLE | 3 | 25 | mA | -40°C | 279 | |
| Idle Current (IIDLE) DC40a | IIDLE | 3 | 25 | mA | +25°C 3.3V 10 MIPS | 279 | |
| Idle Current (IIDLE) DC40b | IIDLE | 3 | 25 | mA | +85°C | 279 | |
| Idle Current (IIDLE) DC41d | IIDLE | 4 | 25 | mA | -40°C | 279 | |
| Idle Current (IIDLE) DC41a | IIDLE | 5 | 25 | mA | +25°C 3.3V 16 MIPS | 279 | |
| Idle Current (IIDLE) DC41b | IIDLE | 6 | 25 | mA | +85°C | 279 | |
| Idle Current (IIDLE) DC42d | IIDLE | 8 | 25 | mA | -40°C | 279 | |
| Idle Current (IIDLE) DC42a | IIDLE | 9 | 25 | mA | +25°C 3.3V 20 MIPS | 279 | |
| Idle Current (IIDLE) DC42b | IIDLE | 10 | 25 | mA | +85°C | 279 | |
| Idle Current (IIDLE) DC43d | IIDLE | 15 | 25 | mA | -40°C 3.3V 30 MIPS | 279 | |
| Idle Current (IIDLE) DC43a | IIDLE | 15 | 25 | mA | +25°C | 279 | |
| Idle Current (IIDLE) DC43b | IIDLE | 15 | 25 | mA | +85°C | 279 | |
| Idle Current (IIDLE) DC44d | IIDLE | 16 | 25 | mA | -40°C | 279 | |
| Idle Current (IIDLE) DC44a | IIDLE | 16 | 25 | mA | +25°C 3.3V 40 MIPS | 279 | |
| Idle Current (IIDLE) DC44b | IIDLE | 16 | 25 | mA | +85°C | 279 | |
| Base Power-Down Current (IPD) DC60d | IPD | 55 | 500 | μA | -40°C | 280 | |
| Base Power-Down Current (IPD) DC60a | IPD | 211 | 500 | μA | +25°C | 280 | |
| Base Power-Down Current (IPD) DC60b | IPD | 244 | 500 | μA | +85°C | 280 | |
| Package Thermal Resistance, 64-pin TQFP (10x10x1 mm) | θJA | 40 | °C/W | Junction to ambient, from package simulations (Note 1) | 276 |
CAD (KiCad official)
- Symbol:
dsPIC33FJ64MC506-I - Footprint:
Package_QFP:TQFP-64_10x10mm_P0.5mm - 3D model: TQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
dspic33fj64mc506-i-etched.step/dspic33fj64mc506-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dspic33fj64mc506-i.step/dspic33fj64mc506-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (340 pp, sha256
a2503355769e895b, retrieved 2026-10-21, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).