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dsPIC33EP32GS504-I/PT

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Microchip Tech Digital Signal Processors / Controllers (DSPs/DSCs), TQFP-44(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentsingle chip microcomputer-microcontrollerdspic33ep32gs504-ifactory-2.0.0extractor-text

Verified dsPIC33EP32GS504-I/PT

by Ray · last 13 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

13 Nov 2026RayPublished by the parts factory: tier mfr, 44 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • •array (skip): not an array of element pairs
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: dsPIC33EP32GS504-I/PT · TQFP-44(10x10) · 44 pins
  • ✓copper: 44 copper pads, none touching another net
  • ✓datasheet: all 44 pin names found in the 390-page datasheet
  • ✓distributor: lcsc C634062, digikey DSPIC33EP32GS504-I/PT-ND, mouser 579-33EP32GS504I/PT
  • ✓family: TQFP-44_10x10mm_P0.8mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-9v4dql65/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.365)
  • ✓pads: 44 pins = 44 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 44 pins agree
  • ✓symbol_text: no pin names collide
  • ✓viewers: viewers/footprint.html 56 kB, viewers/symbol.html 32 kB
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ dspic33ep32gs504-i-pt.kicad_sym✓ dspic33ep32gs504-i-pt.kicad_mod✓ dspic33ep32gs504-i-pt.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray
viewers dspic33ep32gs504-i-pt: viewers rendered from the public page · Ray
dspic33ep32gs504-i-pt-etched.glb dspic33ep32gs504-i-pt: factory component page (tier=mfr) · Ray
dspic33ep32gs504-i-pt-etched.step dspic33ep32gs504-i-pt: factory component page (tier=mfr) · Ray
dspic33ep32gs504-i-pt-hero.glb dspic33ep32gs504-i-pt: hero GLB from the etched model (keeps the MPN mark) · Ray
dspic33ep32gs504-i-pt-hero.overlay.json dspic33ep32gs504-i-pt: hero GLB from the etched model (keeps the MPN mark) · Ray
dspic33ep32gs504-i-pt.glb Publish 0.1.0 · Ray
dspic33ep32gs504-i-pt.kicad_mod Publish 0.1.0 · Ray
dspic33ep32gs504-i-pt.kicad_sym Publish 0.1.0 · Ray
dspic33ep32gs504-i-pt.lbr Publish 0.1.0 · Ray
dspic33ep32gs504-i-pt.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json Set visibility: public · Ray
README.md Publish 0.1.0 · Ray
verification.json Verified: Published by the parts factory: tier mfr, 44 pins · Ray

dsPIC33EP32GS504-I

Microchip Tech · Digital Signal Processors / Controllers (DSPs/DSCs) · TQFP-44(10x10)

dsPIC33EP32GS504-I from Microchip Tech, in a TQFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PGEC1/AN21/SDA1/RP39/RB7 bidirectional Programming/debug clock channel 1 (PGEC1) shares this pin with analog input AN21, I2C1 data SDA1, remappable RP39 and port pin RB7; the leftmost function takes precedence when enabled.
2 AN1ALT/RP52/RC4 bidirectional Alternate analog input AN1ALT shares this pin with remappable RP52 and port pin RC4.
3 AN0ALT/RP53/RC5 bidirectional Alternate analog input AN0ALT shares this pin with remappable RP53 and port pin RC5.
4 AN17/RP54/RC6 bidirectional Analog input AN17 shares this pin with remappable RP54 and port pin RC6.
5 RP51/RC3 bidirectional Remappable peripheral pin RP51 shares this pin with port pin RC3.
6 VSS power_in Ground reference for logic and I/O pins; must be connected.
7 VCAP passive CPU logic filter capacitor connection; must not be connected to VDD and requires a low-ESR (<0.5 Ω) capacitor greater than 4.7 µF (10 µF recommended), 16V, to ground.
8 TMS/PWM3H/RP43/RB11 input JTAG test mode select input (TMS) shares this pin with PWM3H output, remappable RP43 and port pin RB11.
9 TCK/PWM3L/RP44/RB12 input JTAG test clock input (TCK) shares this pin with PWM3L output, remappable RP44 and port pin RB12.
10 PWM2H/RP45/RB13 output PWM2 high output shares this pin with remappable RP45 and port pin RB13.
11 PWM2L/RP46/RB14 output PWM2 low output shares this pin with remappable RP46 and port pin RB14.
12 PWM1H/RA4 output PWM1 high output shares this pin with port pin RA4.
13 PWM1L/RA3 output PWM1 low output shares this pin with port pin RA3.
14 FLT12/RP48/RC0 input PWM Fault input 12 (Schmitt Trigger) shares this pin with remappable RP48 and port pin RC0.
15 FLT11/RP61/RC13 input PWM Fault input 11 (Schmitt Trigger) shares this pin with remappable RP61 and port pin RC13.
16 AVSS power_in Ground reference for analog modules; must be connected at all times.
17 AVDD power_in Positive supply for analog modules; must be connected at all times.
18 MCLR input Master Clear (Reset) input; active-low Reset to the device.
19 AN12/ISRC1/RP59/RC11 bidirectional Analog input AN12 shares this pin with constant-current source output ISRC1, remappable RP59 and port pin RC11.
20 AN14/PGA2N3/RP60/RC12 bidirectional Analog input AN14 shares this pin with PGA2 negative input PGA2N3, remappable RP60 and port pin RC12.
21 AN0/PGA1P1/CMP1A/RA0 bidirectional Analog input AN0 shares this pin with PGA1 positive input PGA1P1, comparator input CMP1A and port pin RA0.
22 AN1/PGA1P2/PGA2P1/CMP1B/RA1 bidirectional Analog input AN1 shares this pin with PGA1 positive input PGA1P2, PGA2 positive input PGA2P1, comparator input CMP1B and port pin RA1.
23 AN2/PGA1P3/PGA2P2/CMP1C/CMP2A/RA2 bidirectional Analog input AN2 shares this pin with PGA1 positive input PGA1P3, PGA2 positive input PGA2P2, comparator inputs CMP1C and CMP2A and port pin RA2.
24 AN3/PGA2P3/CMP1D/CMP2B/RP32/RB0 bidirectional Analog input AN3 shares this pin with PGA2 positive input PGA2P3, comparator inputs CMP1D and CMP2B, remappable RP32 and port pin RB0.
25 AN4/CMP2C/CMP3A/ISRC4/RP41/RB9 bidirectional Analog input AN4 shares this pin with comparator inputs CMP2C and CMP3A, constant-current source output ISRC4, remappable RP41 and port pin RB9.
26 AN5/CMP2D/CMP3B/ISRC3/RP42/RB10 bidirectional Analog input AN5 shares this pin with comparator inputs CMP2D and CMP3B, constant-current source output ISRC3, remappable RP42 and port pin RB10.
27 AN11/PGA1N3/RP57/RC9 bidirectional Analog input AN11 shares this pin with PGA1 negative input PGA1N3, remappable RP57 and port pin RC9.
28 AN10/PGA1P4/EXTREF2/RP58/RC10 bidirectional Analog input AN10 shares this pin with PGA1 positive input PGA1P4, external voltage reference input EXTREF2, remappable RP58 and port pin RC10.
29 VDD power_in Positive supply for peripheral logic and I/O pins; must be connected.
30 VSS power_in Ground reference for logic and I/O pins; must be connected.
31 AN8/PGA2P4/CMP4C/RP49/RC1 bidirectional Analog input AN8 shares this pin with PGA2 positive input PGA2P4, comparator input CMP4C, remappable RP49 and port pin RC1.
32 OSC1/CLKI/AN6/CMP3C/CMP4A/ISRC2/RP33/RB1 input Oscillator crystal input (ST buffer in RC mode, CMOS otherwise) and external clock input CLKI; also shares analog input AN6, comparator inputs, ISRC2, remappable RP33 and port pin RB1.
33 OSC2/CLKO/AN7/PGA1N2/CMP3D/CMP4B/RP34/RB2 bidirectional Oscillator crystal output (or CLKO in RC/EC modes) shares this pin with analog input AN7, PGA1 negative input PGA1N2, comparator inputs, remappable RP34 and port pin RB2.
34 PGED2/AN18/DACOUT1/INT0/RP35/RB3 bidirectional Programming/debug data channel 2 (PGED2) shares this pin with analog input AN18, DAC output DACOUT1, external interrupt INT0 (not remappable), remappable RP35 and port pin RB3.
35 PGEC2/ADTRG31/RP36/RB4 bidirectional Programming/debug clock channel 2 (PGEC2) shares this pin with external ADC trigger ADTRG31, remappable RP36 and port pin RB4.
36 AN9/CMP4D/EXTREF1/RP50/RC2 bidirectional Analog input AN9 shares this pin with comparator input CMP4D, external voltage reference input EXTREF1, remappable RP50 and port pin RC2.
37 ASDA1/RP55/RC7 bidirectional Alternate I2C1 serial data ASDA1 shares this pin with remappable RP55 and port pin RC7.
38 ASCL1/RP56/RC8 bidirectional Alternate I2C1 serial clock ASCL1 shares this pin with remappable RP56 and port pin RC8.
39 VSS power_in Ground reference for logic and I/O pins; must be connected.
40 VDD power_in Positive supply for peripheral logic and I/O pins; must be connected.
41 PGED3/SDA2/FLT31/RP40/RB8 bidirectional Programming/debug data channel 3 (PGED3) shares this pin with I2C2 data SDA2, PWM Fault 31 (Class B fault), remappable RP40 and port pin RB8.
42 PGEC3/SCL2/RP47/RB15 bidirectional Programming/debug clock channel 3 (PGEC3) shares this pin with I2C2 clock SCL2, remappable RP47 and port pin RB15.
43 TDO/AN19/PGA2N2/RP37/RB5 bidirectional JTAG test data output (TDO) shares this pin with analog input AN19, PGA2 negative input PGA2N2, remappable RP37 and port pin RB5.
44 PGED1/TDI/AN20/SCL1/RP38/RB6 bidirectional Programming/debug data channel 1 (PGED1) shares this pin with JTAG test data input TDI, analog input AN20, I2C1 clock SCL1, remappable RP38 and port pin RB6.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-44(10x10)
Category Single Chip Microcomputer/Microcontroller
Pins 44

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Ambient temperature under bias -40 125 °C 303
Storage temperature -65 150 °C 303
Voltage on VDD with respect to VSS VDD -0.3 4 V 303
Voltage on any pin that is not 5V tolerant with respect to VSS -0.3 V max printed as (VDD + 0.3V) 303
Voltage on any 5V tolerant pin with respect to VSS when VDD ≥ 3.0V -0.3 5.5 V when VDD ≥ 3.0V 303
Voltage on any 5V tolerant pin with respect to VSS when VDD < 3.0V -0.3 3.6 V when VDD < 3.0V 303
Operating Junction Temperature Range (industrial) TJ -40 125 °C Industrial Temperature Devices 304
Operating Ambient Temperature Range (industrial) TA -40 85 °C Industrial Temperature Devices 304
Maximum MIPS 70 MIPS VDD 3.0V to 3.6V, -40°C to +85°C 304
Maximum MIPS 60 MIPS VDD 3.0V to 3.6V, -40°C to +125°C 304
VDD Supply Voltage DC10 VDD 3 3.6 V 305
RAM Retention Voltage VDR 1.8 V -40ºC 305
RAM Retention Voltage VDR 2 V +25ºC, +85ºC, +125ºC 305
VDD Rise Rate to Ensure Internal Power-on Reset Signal SVDD 1 V/ms 0V-3V in 3 ms 305
External Filter Capacitor Value CEFC 4.7 10 F Capacitor must have a low series resistance (<1 ohm) 305
OSC2 Pin capacitive loading COSCO 15 pF In XT and HS modes, when external clock is used to drive OSC1 315
All I/O Pins and OSC2 capacitive loading CIO 50 pF EC mode 315
SCLx, SDAx capacitive loading CB 400 pF In I2C mode 315
Package Thermal Resistance, 44-Pin TQFP 10x10x1 mm JA 50 °C/W Junction to ambient, package simulation (Note 1) 304

CAD (KiCad official)

  • Symbol: dsPIC33EP32GS504-I
  • Footprint: Package_QFP:TQFP-44_10x10mm_P0.8mm
  • 3D model: TQFP-44(10x10) (KiCad packages3D, STEP)
  • 3D model files: dspic33ep32gs504-i-pt-etched.step / dspic33ep32gs504-i-pt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dspic33ep32gs504-i-pt.step / dspic33ep32gs504-i-pt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (390 pp, sha256 69126c50f4a4115e, retrieved 2026-11-13, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF