component
dsPIC33EP16GS504-I
Public Made by Adomby adom
Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), TQFP-44(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
Ray
Publish 0.1.0
da68e14
dsPIC33EP16GS504-I
Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · TQFP-44(10x10)
dsPIC33EP16GS504-I from Microchip Tech, in a TQFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PGEC1/AN21/SDA1/RP39/RB7 | bidirectional | PORTB bit 7 I/O shared with ICSP clock channel 1, analog input AN21, I2C1 data and remappable pin RP39. |
| 2 | AN1ALT/RP52/RC4 | bidirectional | PORTC bit 4 I/O shared with alternate analog input AN1ALT and remappable pin RP52. |
| 3 | AN0ALT/RP53/RC5 | bidirectional | PORTC bit 5 I/O shared with alternate analog input AN0ALT and remappable pin RP53. |
| 4 | AN17/RP54/RC6 | bidirectional | PORTC bit 6 I/O shared with analog input AN17 and remappable pin RP54. |
| 5 | RP51/RC3 | bidirectional | PORTC bit 3 I/O with remappable pin function RP51. |
| 6 | VSS | power_in | Ground reference for logic and I/O pins; must always be connected. |
| 7 | VCAP | passive | CPU logic filter capacitor connection; needs a low-ESR (<0.5 ohm) capacitor greater than 4.7 uF (10 uF recommended, 16V) to ground and must not be connected to VDD. |
| 8 | TMS/PWM3H/RP43/RB11 | bidirectional | PORTB bit 11 I/O shared with JTAG test mode select, PWM3 high output and remappable pin RP43. |
| 9 | TCK/PWM3L/RP44/RB12 | bidirectional | PORTB bit 12 I/O shared with JTAG test clock input, PWM3 low output and remappable pin RP44. |
| 10 | PWM2H/RP45/RB13 | bidirectional | PORTB bit 13 I/O shared with PWM2 high output and remappable pin RP45. |
| 11 | PWM2L/RP46/RB14 | bidirectional | PORTB bit 14 I/O shared with PWM2 low output and remappable pin RP46. |
| 12 | PWM1H/RA4 | bidirectional | PORTA bit 4 I/O shared with PWM1 high output. |
| 13 | PWM1L/RA3 | bidirectional | PORTA bit 3 I/O shared with PWM1 low output. |
| 14 | FLT12/RP48/RC0 | bidirectional | PORTC bit 0 I/O shared with PWM fault input 12 and remappable pin RP48. |
| 15 | FLT11/RP61/RC13 | bidirectional | PORTC bit 13 I/O shared with PWM fault input 11 and remappable pin RP61. |
| 16 | AVSS | power_in | Ground reference for analog modules; must be connected at all times. |
| 17 | AVDD | power_in | Positive supply for analog modules; must be connected at all times. |
| 18 | MCLR | input | Master Clear active-low Reset input, also used for device programming and debugging. |
| 19 | AN12/ISRC1/RP59/RC11 | bidirectional | PORTC bit 11 I/O shared with analog input AN12, constant-current output ISRC1 and remappable pin RP59. |
| 20 | AN14/PGA2N3/RP60/RC12 | bidirectional | PORTC bit 12 I/O shared with analog input AN14, PGA2 negative input 3 and remappable pin RP60. |
| 21 | AN0/PGA1P1/CMP1A/RA0 | bidirectional | PORTA bit 0 I/O shared with analog input AN0, PGA1 positive input 1 and comparator 1 input A. |
| 22 | AN1/PGA1P2/PGA2P1/CMP1B/RA1 | bidirectional | PORTA bit 1 I/O shared with analog input AN1, PGA1 positive input 2, PGA2 positive input 1 and comparator 1 input B. |
| 23 | AN2/PGA1P3/PGA2P2/CMP1C/CMP2A/RA2 | bidirectional | PORTA bit 2 I/O shared with analog input AN2, PGA1 positive input 3, PGA2 positive input 2 and comparator 1 input C and comparator 2 input A. |
| 24 | AN3/PGA2P3/CMP1D/CMP2B/RP32/RB0 | bidirectional | PORTB bit 0 I/O shared with analog input AN3, PGA2 positive input 3, comparator 1 input D and comparator 2 input B, and remappable pin RP32. |
| 25 | AN4/CMP2C/CMP3A/ISRC4/RP41/RB9 | bidirectional | PORTB bit 9 I/O shared with analog input AN4, comparator 2 input C and comparator 3 input A, constant-current output ISRC4 and remappable pin RP41. |
| 26 | AN5/CMP2D/CMP3B/ISRC3/RP42/RB10 | bidirectional | PORTB bit 10 I/O shared with analog input AN5, comparator 2 input D and comparator 3 input B, constant-current output ISRC3 and remappable pin RP42. |
| 27 | AN11/PGA1N3/RP57/RC9 | bidirectional | PORTC bit 9 I/O shared with analog input AN11, PGA1 negative input 3 and remappable pin RP57. |
| 28 | AN10/PGA1P4/EXTREF2/RP58/RC10 | bidirectional | PORTC bit 10 I/O shared with analog input AN10, PGA1 positive input 4, external reference input 2 and remappable pin RP58. |
| 29 | VDD | power_in | Positive supply for peripheral logic and I/O pins; must always be connected. |
| 30 | VSS | power_in | Ground reference for logic and I/O pins; must always be connected. |
| 31 | AN8/PGA2P4/CMP4C/RP49/RC1 | bidirectional | PORTC bit 1 I/O shared with analog input AN8, PGA2 positive input 4, comparator 4 input C and remappable pin RP49. |
| 32 | OSC1/CLKI/AN6/CMP3C/CMP4A/ISRC2/RP33/RB1 | bidirectional | Oscillator crystal input or external clock input CLKI, shared with analog input AN6, comparator 3 input C and comparator 4 input A, constant-current output ISRC2, remappable pin RP33 and PORTB bit 1. |
| 33 | OSC2/CLKO/AN7/PGA1N2/CMP3D/CMP4B/RP34/RB2 | bidirectional | Oscillator crystal output or CLKO, shared with analog input AN7, PGA1 negative input 2, comparator 3 input D and comparator 4 input B, remappable pin RP34 and PORTB bit 2. |
| 34 | PGED2/AN18/DACOUT1/INT0/RP35/RB3 | bidirectional | PORTB bit 3 I/O shared with ICSP data channel 2, analog input AN18, DAC output 1, external interrupt 0 and remappable pin RP35. |
| 35 | PGEC2/ADTRG31/RP36/RB4 | bidirectional | PORTB bit 4 I/O shared with ICSP clock channel 2, external ADC trigger source ADTRG31 and remappable pin RP36. |
| 36 | AN9/CMP4D/EXTREF1/RP50/RC2 | bidirectional | PORTC bit 2 I/O shared with analog input AN9, comparator 4 input D, external reference input 1 and remappable pin RP50. |
| 37 | ASDA1/RP55/RC7 | bidirectional | PORTC bit 7 I/O shared with alternate I2C1 data and remappable pin RP55. |
| 38 | ASCL1/RP56/RC8 | bidirectional | PORTC bit 8 I/O shared with alternate I2C1 clock and remappable pin RP56. |
| 39 | VSS | power_in | Ground reference for logic and I/O pins; must always be connected. |
| 40 | VDD | power_in | Positive supply for peripheral logic and I/O pins; must always be connected. |
| 41 | PGED3/SDA2/FLT31/RP40/RB8 | bidirectional | PORTB bit 8 I/O shared with ICSP data channel 3, I2C2 data, PWM fault input 31 (Class B) and remappable pin RP40. |
| 42 | PGEC3/SCL2/RP47/RB15 | bidirectional | PORTB bit 15 I/O shared with ICSP clock channel 3, I2C2 clock and remappable pin RP47. |
| 43 | TDO/AN19/PGA2N2/RP37/RB5 | bidirectional | PORTB bit 5 I/O shared with JTAG test data output, analog input AN19, PGA2 negative input 2 and remappable pin RP37. |
| 44 | PGED1/TDI/AN20/SCL1/RP38/RB6 | bidirectional | PORTB bit 6 I/O shared with ICSP data channel 1, JTAG test data input, analog input AN20, I2C1 clock and remappable pin RP38. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-44(10x10) |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 44 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Voltage on VDD with respect to VSS | -0.3 | 4 | V | 303 | |||
| Voltage on any 5V tolerant pin with respect to VSS when VDD >= 3.0V | -0.3 | 5.5 | V | VDD >= 3.0V | 303 | ||
| Voltage on any 5V tolerant pin with respect to VSS when VDD < 3.0V | -0.3 | 3.6 | V | VDD < 3.0V | 303 | ||
| Voltage on any pin that is not 5V tolerant with respect to VSS | -0.3 | V | Upper limit printed as (VDD + 0.3V) | 303 | |||
| Ambient temperature under bias | -40 | 125 | °C | 303 | |||
| Storage temperature | -65 | 150 | °C | 303 | |||
| Supply Voltage | VDD | 3 | 3.6 | V | 305 | ||
| RAM Retention Voltage | VDR | 1.8 | V | -40ºC | 305 | ||
| RAM Retention Voltage | VDR | 2 | V | +25ºC, +85ºC, +125ºC | 305 | ||
| VDD Rise Rate to Ensure Internal Power-on Reset Signal | SVDD | 1 | V/ms | 0V-3V in 3 ms | 305 | ||
| External Filter Capacitor Value | CEFC | 4.7 | 10 | F | Capacitor must have a low series resistance (<1 ohm) | 305 | |
| Operating Junction Temperature Range (Industrial) | TJ | -40 | 125 | °C | Industrial Temperature Devices | 304 | |
| Operating Ambient Temperature Range (Industrial) | TA | -40 | 85 | °C | Industrial Temperature Devices | 304 | |
| Package Thermal Resistance, 44-Pin TQFP 10x10x1 mm | θJA | 50 | °C/W | Junction to ambient, Note 1 | 304 | ||
| Maximum MIPS | 70 | MIPS | 3.0V to 3.6V, -40°C to +85°C | 304 | |||
| Maximum MIPS | 60 | MIPS | 3.0V to 3.6V, -40°C to +125°C | 304 | |||
| OSC2 Pin Capacitive Loading | COSCO | 15 | pF | In XT and HS modes, when external clock is used to drive OSC1 | 315 | ||
| All I/O Pins and OSC2 Capacitive Loading | CIO | 50 | pF | EC mode | 315 | ||
| SCLx, SDAx Capacitive Loading | CB | 400 | pF | In I2C mode | 315 |
CAD (KiCad official)
- Symbol:
dsPIC33EP16GS504-I - Footprint:
Package_QFP:TQFP-44_10x10mm_P0.8mm - 3D model: TQFP-44(10x10) (KiCad packages3D, STEP)
- 3D model files:
dspic33ep16gs504-i-etched.step/dspic33ep16gs504-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dspic33ep16gs504-i.step/dspic33ep16gs504-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (390 pp, sha256
69126c50f4a4115e, retrieved 2026-11-09, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# dsPIC33EP16GS504-I
**Microchip Tech** · Microcontroller Units (MCUs/MPUs/SOCs) · TQFP-44(10x10)
dsPIC33EP16GS504-I from Microchip Tech, in a TQFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PGEC1/AN21/SDA1/RP39/RB7 | bidirectional | PORTB bit 7 I/O shared with ICSP clock channel 1, analog input AN21, I2C1 data and remappable pin RP39. |
| 2 | AN1ALT/RP52/RC4 | bidirectional | PORTC bit 4 I/O shared with alternate analog input AN1ALT and remappable pin RP52. |
| 3 | AN0ALT/RP53/RC5 | bidirectional | PORTC bit 5 I/O shared with alternate analog input AN0ALT and remappable pin RP53. |
| 4 | AN17/RP54/RC6 | bidirectional | PORTC bit 6 I/O shared with analog input AN17 and remappable pin RP54. |
| 5 | RP51/RC3 | bidirectional | PORTC bit 3 I/O with remappable pin function RP51. |
| 6 | VSS | power_in | Ground reference for logic and I/O pins; must always be connected. |
| 7 | VCAP | passive | CPU logic filter capacitor connection; needs a low-ESR (<0.5 ohm) capacitor greater than 4.7 uF (10 uF recommended, 16V) to ground and must not be connected to VDD. |
| 8 | TMS/PWM3H/RP43/RB11 | bidirectional | PORTB bit 11 I/O shared with JTAG test mode select, PWM3 high output and remappable pin RP43. |
| 9 | TCK/PWM3L/RP44/RB12 | bidirectional | PORTB bit 12 I/O shared with JTAG test clock input, PWM3 low output and remappable pin RP44. |
| 10 | PWM2H/RP45/RB13 | bidirectional | PORTB bit 13 I/O shared with PWM2 high output and remappable pin RP45. |
| 11 | PWM2L/RP46/RB14 | bidirectional | PORTB bit 14 I/O shared with PWM2 low output and remappable pin RP46. |
| 12 | PWM1H/RA4 | bidirectional | PORTA bit 4 I/O shared with PWM1 high output. |
| 13 | PWM1L/RA3 | bidirectional | PORTA bit 3 I/O shared with PWM1 low output. |
| 14 | FLT12/RP48/RC0 | bidirectional | PORTC bit 0 I/O shared with PWM fault input 12 and remappable pin RP48. |
| 15 | FLT11/RP61/RC13 | bidirectional | PORTC bit 13 I/O shared with PWM fault input 11 and remappable pin RP61. |
| 16 | AVSS | power_in | Ground reference for analog modules; must be connected at all times. |
| 17 | AVDD | power_in | Positive supply for analog modules; must be connected at all times. |
| 18 | MCLR | input | Master Clear active-low Reset input, also used for device programming and debugging. |
| 19 | AN12/ISRC1/RP59/RC11 | bidirectional | PORTC bit 11 I/O shared with analog input AN12, constant-current output ISRC1 and remappable pin RP59. |
| 20 | AN14/PGA2N3/RP60/RC12 | bidirectional | PORTC bit 12 I/O shared with analog input AN14, PGA2 negative input 3 and remappable pin RP60. |
| 21 | AN0/PGA1P1/CMP1A/RA0 | bidirectional | PORTA bit 0 I/O shared with analog input AN0, PGA1 positive input 1 and comparator 1 input A. |
| 22 | AN1/PGA1P2/PGA2P1/CMP1B/RA1 | bidirectional | PORTA bit 1 I/O shared with analog input AN1, PGA1 positive input 2, PGA2 positive input 1 and comparator 1 input B. |
| 23 | AN2/PGA1P3/PGA2P2/CMP1C/CMP2A/RA2 | bidirectional | PORTA bit 2 I/O shared with analog input AN2, PGA1 positive input 3, PGA2 positive input 2 and comparator 1 input C and comparator 2 input A. |
| 24 | AN3/PGA2P3/CMP1D/CMP2B/RP32/RB0 | bidirectional | PORTB bit 0 I/O shared with analog input AN3, PGA2 positive input 3, comparator 1 input D and comparator 2 input B, and remappable pin RP32. |
| 25 | AN4/CMP2C/CMP3A/ISRC4/RP41/RB9 | bidirectional | PORTB bit 9 I/O shared with analog input AN4, comparator 2 input C and comparator 3 input A, constant-current output ISRC4 and remappable pin RP41. |
| 26 | AN5/CMP2D/CMP3B/ISRC3/RP42/RB10 | bidirectional | PORTB bit 10 I/O shared with analog input AN5, comparator 2 input D and comparator 3 input B, constant-current output ISRC3 and remappable pin RP42. |
| 27 | AN11/PGA1N3/RP57/RC9 | bidirectional | PORTC bit 9 I/O shared with analog input AN11, PGA1 negative input 3 and remappable pin RP57. |
| 28 | AN10/PGA1P4/EXTREF2/RP58/RC10 | bidirectional | PORTC bit 10 I/O shared with analog input AN10, PGA1 positive input 4, external reference input 2 and remappable pin RP58. |
| 29 | VDD | power_in | Positive supply for peripheral logic and I/O pins; must always be connected. |
| 30 | VSS | power_in | Ground reference for logic and I/O pins; must always be connected. |
| 31 | AN8/PGA2P4/CMP4C/RP49/RC1 | bidirectional | PORTC bit 1 I/O shared with analog input AN8, PGA2 positive input 4, comparator 4 input C and remappable pin RP49. |
| 32 | OSC1/CLKI/AN6/CMP3C/CMP4A/ISRC2/RP33/RB1 | bidirectional | Oscillator crystal input or external clock input CLKI, shared with analog input AN6, comparator 3 input C and comparator 4 input A, constant-current output ISRC2, remappable pin RP33 and PORTB bit 1. |
| 33 | OSC2/CLKO/AN7/PGA1N2/CMP3D/CMP4B/RP34/RB2 | bidirectional | Oscillator crystal output or CLKO, shared with analog input AN7, PGA1 negative input 2, comparator 3 input D and comparator 4 input B, remappable pin RP34 and PORTB bit 2. |
| 34 | PGED2/AN18/DACOUT1/INT0/RP35/RB3 | bidirectional | PORTB bit 3 I/O shared with ICSP data channel 2, analog input AN18, DAC output 1, external interrupt 0 and remappable pin RP35. |
| 35 | PGEC2/ADTRG31/RP36/RB4 | bidirectional | PORTB bit 4 I/O shared with ICSP clock channel 2, external ADC trigger source ADTRG31 and remappable pin RP36. |
| 36 | AN9/CMP4D/EXTREF1/RP50/RC2 | bidirectional | PORTC bit 2 I/O shared with analog input AN9, comparator 4 input D, external reference input 1 and remappable pin RP50. |
| 37 | ASDA1/RP55/RC7 | bidirectional | PORTC bit 7 I/O shared with alternate I2C1 data and remappable pin RP55. |
| 38 | ASCL1/RP56/RC8 | bidirectional | PORTC bit 8 I/O shared with alternate I2C1 clock and remappable pin RP56. |
| 39 | VSS | power_in | Ground reference for logic and I/O pins; must always be connected. |
| 40 | VDD | power_in | Positive supply for peripheral logic and I/O pins; must always be connected. |
| 41 | PGED3/SDA2/FLT31/RP40/RB8 | bidirectional | PORTB bit 8 I/O shared with ICSP data channel 3, I2C2 data, PWM fault input 31 (Class B) and remappable pin RP40. |
| 42 | PGEC3/SCL2/RP47/RB15 | bidirectional | PORTB bit 15 I/O shared with ICSP clock channel 3, I2C2 clock and remappable pin RP47. |
| 43 | TDO/AN19/PGA2N2/RP37/RB5 | bidirectional | PORTB bit 5 I/O shared with JTAG test data output, analog input AN19, PGA2 negative input 2 and remappable pin RP37. |
| 44 | PGED1/TDI/AN20/SCL1/RP38/RB6 | bidirectional | PORTB bit 6 I/O shared with ICSP data channel 1, JTAG test data input, analog input AN20, I2C1 clock and remappable pin RP38. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-44(10x10) |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 44 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Voltage on VDD with respect to VSS | | -0.3 | | 4 | V | | 303 |
| Voltage on any 5V tolerant pin with respect to VSS when VDD >= 3.0V | | -0.3 | | 5.5 | V | VDD >= 3.0V | 303 |
| Voltage on any 5V tolerant pin with respect to VSS when VDD < 3.0V | | -0.3 | | 3.6 | V | VDD < 3.0V | 303 |
| Voltage on any pin that is not 5V tolerant with respect to VSS | | -0.3 | | | V | Upper limit printed as (VDD + 0.3V) | 303 |
| Ambient temperature under bias | | -40 | | 125 | °C | | 303 |
| Storage temperature | | -65 | | 150 | °C | | 303 |
| Supply Voltage | VDD | 3 | | 3.6 | V | | 305 |
| RAM Retention Voltage | VDR | 1.8 | | | V | -40ºC | 305 |
| RAM Retention Voltage | VDR | 2 | | | V | +25ºC, +85ºC, +125ºC | 305 |
| VDD Rise Rate to Ensure Internal Power-on Reset Signal | SVDD | 1 | | | V/ms | 0V-3V in 3 ms | 305 |
| External Filter Capacitor Value | CEFC | 4.7 | 10 | | F | Capacitor must have a low series resistance (<1 ohm) | 305 |
| Operating Junction Temperature Range (Industrial) | TJ | -40 | | 125 | °C | Industrial Temperature Devices | 304 |
| Operating Ambient Temperature Range (Industrial) | TA | -40 | | 85 | °C | Industrial Temperature Devices | 304 |
| Package Thermal Resistance, 44-Pin TQFP 10x10x1 mm | θJA | | 50 | | °C/W | Junction to ambient, Note 1 | 304 |
| Maximum MIPS | | | | 70 | MIPS | 3.0V to 3.6V, -40°C to +85°C | 304 |
| Maximum MIPS | | | | 60 | MIPS | 3.0V to 3.6V, -40°C to +125°C | 304 |
| OSC2 Pin Capacitive Loading | COSCO | | | 15 | pF | In XT and HS modes, when external clock is used to drive OSC1 | 315 |
| All I/O Pins and OSC2 Capacitive Loading | CIO | | | 50 | pF | EC mode | 315 |
| SCLx, SDAx Capacitive Loading | CB | | | 400 | pF | In I2C mode | 315 |
## CAD (KiCad official)
- Symbol: `dsPIC33EP16GS504-I`
- Footprint: `Package_QFP:TQFP-44_10x10mm_P0.8mm`
- 3D model: TQFP-44(10x10) (KiCad packages3D, STEP)
- 3D model files: `dspic33ep16gs504-i-etched.step` / `dspic33ep16gs504-i-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dspic33ep16gs504-i.step` / `dspic33ep16gs504-i.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](docs/dspic33ep16gs504-i-datasheet.pdf) (390 pp, sha256 `69126c50f4a4115e`, retrieved 2026-11-09, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/dspic33ep16gs504-i-datasheet.pdf)