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Contents

README

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dsPIC33EP128GS806-I

Microchip Tech · Pre-ordered MCUs · TQFP-64(10x10)

dsPIC33EP128GS806-I from Microchip Tech, in a TQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PWM4L/RP67/RD3 output PWM Low Output 4 (PWM4L) which can also be remapped via Peripheral Pin Select to RP67, with port function RD3.
2 PWM1H/RP20/RA4 output PWM High Output 1 (PWM1H) which can also be remapped via Peripheral Pin Select to RP20, with port function RA4.
3 PWM1L/RP19/RA3 output PWM Low Output 1 (PWM1L) which can also be remapped via Peripheral Pin Select to RP19, with port function RA3.
4 FLT12/RP48/RC0 input PWM Fault Input 12 (FLT12), a Schmitt Trigger input that can also be remapped to RP48 with port function RC0.
5 FLT11/RP61/RC13 input PWM Fault Input 11 (FLT11), a Schmitt Trigger input that can also be remapped to RP61 with port function RC13.
6 CLC4OUT/FLT10/RP74/RD10 output Configurable Logic Cell 4 output (CLC4OUT), with PWM Fault Input 10 (FLT10) and remappable RP74 and port function RD10.
7 MCLR input Master Clear (Reset) input; an active-low Reset to the device.
8 T5CK/FLT9/RP76/RD12 input Timer5 external clock input (T5CK), with PWM Fault Input 9 (FLT9) and remappable RP76 and port function RD12.
9 VSS power_in Ground reference for logic and I/O pins.
10 VDD power_in Positive supply for peripheral logic and I/O pins.
11 AVDD power_in Positive supply for analog modules; this pin must be connected at all times.
12 AN14/PGA2N3/RP60/RC12 input Analog input channel AN14, also PGA2 negative input 3 (PGA2N3), remappable to RP60 with port function RC12.
13 AN0/CMP1A/PGA1P1/RP16/RA0 input Analog input channel AN0, also Comparator 1A input and PGA1 positive input 1, remappable to RP16 with port function RA0.
14 AN1/CMP1B/PGA1P2/PGA2P1/RP17/RA1 input Analog input channel AN1, also Comparator 1B input and PGA positive inputs, remappable to RP17 with port function RA1.
15 AN2/CMP1C/CMP2A/PGA1P3/PGA2P2/RP18/RA2 input Analog input channel AN2, also Comparator 1C/2A inputs and PGA positive inputs, remappable to RP18 with port function RA2.
16 AN3/CMP1D/CMP2B/PGA2P3/RP32/RB0 input Analog input channel AN3, also Comparator 1D/2B inputs and PGA2 positive input 3, remappable to RP32 with port function RB0.
17 AN4/CMP2C/CMP3A/ISRC4/RP41/RB9 input Analog input channel AN4, also Comparator 2C/3A inputs and constant-current source ISRC4, remappable to RP41 with port function RB9.
18 AVDD power_in Positive supply for analog modules; this pin must be connected at all times.
19 AVDD power_in Positive supply for analog modules; this pin must be connected at all times.
20 AVSS power_in Ground reference for analog modules; this pin must be connected at all times.
21 AN15/RP71/RD7 input Analog input channel AN15, remappable to RP71 with port function RD7.
22 DACOUT2/AN13/RD13 output DAC Output Voltage 2 (DACOUT2), also analog input AN13, with port function RD13; this pin is only available on 64-pin devices.
23 AN11/PGA1N3/RP57/RC9 input Analog input channel AN11, also PGA1 negative input 3, remappable to RP57 with port function RC9.
24 EXTREF2/AN10/PGA1P4/RP58/RC10 input External Voltage Reference Input 2 (EXTREF2), also analog input AN10 and PGA1 positive input 4, remappable to RP58 with port function RC10.
25 VSS power_in Ground reference for logic and I/O pins.
26 VDD power_in Positive supply for peripheral logic and I/O pins.
27 AN8/CMP4C/PGA2P4/RP49/RC1 input Analog input channel AN8, also Comparator 4C input and PGA2 positive input 4, remappable to RP49 with port function RC1.
28 OSCI/CLKI/AN6/CMP3C/CMP4A/ISRC2/RP33/RB1 input Oscillator crystal input (OSCI) and external clock source input (CLKI), also analog input AN6, remappable to RP33 with port function RB1.
29 OSC2/CLKO/AN7/CMP3D/CMP4B/PGA1N2/RP34/RB2(1) bidirectional Oscillator crystal output (OSC2) which optionally functions as CLKO, also analog input AN7 and PGA1 negative input 2, remappable to RP34 with port function RB2; footnote 1 applies at power-up.
30 AN16/RP66/RD2 input Analog input channel AN16, remappable to RP66 with port function RD2.
31 ASDA2/RP63/RC15 bidirectional Alternate synchronous serial data I/O for I2C2 (ASDA2), remappable to RP63 with port function RC15.
32 PGED2/DACOUT1/AN18/ASCL2/INT0/RP35/RB3 bidirectional Data I/O pin for programming/debugging channel 2 (PGED2), also DAC Output Voltage 1 (DACOUT1), external interrupt INT0, and remappable RP35 with port function RB3.
33 PGEC2/ADTRG31/RP36/RB4 input Clock input pin for programming/debugging channel 2 (PGEC2), also external ADC trigger source ADTRG31, remappable to RP36 with port function RB4.
34 RP62/RC14 bidirectional Remappable peripheral pin RP62 with port function RC14.
35 EXTREF1/AN9/CMP4D/RP50/RC2 input External Voltage Reference Input 1 (EXTREF1), also analog input AN9 and Comparator 4D input, remappable to RP50 with port function RC2.
36 ASDA1/RP55/RC7 bidirectional Alternate synchronous serial data I/O for I2C1 (ASDA1), remappable to RP55 with port function RC7.
37 ASCL1/RP56/RC8 bidirectional Alternate synchronous serial clock I/O for I2C1 (ASCL1), remappable to RP56 with port function RC8.
38 VDD power_in Positive supply for peripheral logic and I/O pins.
39 CLC3OUT/RD14 output Configurable Logic Cell 3 output (CLC3OUT) with port function RD14.
40 SCK3/RP73/RD9 bidirectional Synchronous serial clock input/output for SPI3 (SCK3), fixed on this device, with remappable RP73 and port function RD9.
41 VSS power_in Ground reference for logic and I/O pins.
42 AN5/CMP2D/CMP3B/ISRC3/RP72/RD8 input Analog input channel AN5, also Comparator 2D/3B inputs and constant-current source ISRC3, remappable to RP72 with port function RD8.
43 PGED3/SDA2/FLT31/RP40/RB8 bidirectional Data I/O pin for programming/debugging channel 3 (PGED3), also I2C2 data (SDA2), PWM Fault Input 31 (FLT31, Class B Fault), remappable to RP40 with port function RB8.
44 PGEC3/SCL2/RP47/RB15 input Clock input pin for programming/debugging channel 3 (PGEC3), also I2C2 clock (SCL2), remappable to RP47 with port function RB15.
45 INT4/RP75/RD11 input External Interrupt 4 (INT4), not remappable, with remappable RP75 and port function RD11.
46 TDO/AN19/PGA2N2/RP37/RB5 output JTAG test data output pin (TDO), also analog input AN19 and PGA2 negative input 2, remappable to RP37 with port function RB5.
47 T4CK/RP64/RD0 input Timer4 external clock input (T4CK), remappable to RP64 with port function RD0.
48 PGED1/TDI/AN20/SCL1/RP38/RB6 bidirectional Data I/O pin for programming/debugging channel 1 (PGED1), also JTAG test data input (TDI), analog input AN20 and I2C1 clock (SCL1), remappable to RP38 with port function RB6.
49 PGEC1/AN21/SDA1/RP39/RB7 input Clock input pin for programming/debugging channel 1 (PGEC1), also analog input AN21 and I2C1 data (SDA1), remappable to RP39 with port function RB7.
50 AN1ALT/RP52/RC4 input Alternate analog input channel AN1ALT, remappable to RP52 with port function RC4.
51 AN0ALT/RP53/RC5 input Alternate analog input channel AN0ALT, remappable to RP53 with port function RC5.
52 AN17/RP54/RC6 input Analog input channel AN17, remappable to RP54 with port function RC6.
53 AN12/ISRC1/RP69/RD5 input Analog input channel AN12, also constant-current source ISRC1, remappable to RP69 with port function RD5.
54 PWM5H/RP70/RD6 output PWM High Output 5 (PWM5H), remappable to RP70 with port function RD6.
55 PWM5L/RP51/RC3 output PWM Low Output 5 (PWM5L), remappable to RP51 with port function RC3.
56 VCAP passive CPU logic filter capacitor connection; a low-ESR capacitor greater than 4.7 µF (10 µF recommended), 16V, connected to ground is required, and VCAP must not be connected to VDD.
57 VDD power_in Positive supply for peripheral logic and I/O pins.
58 PWM6H/RP68/RD4 output PWM High Output 6 (PWM6H), remappable to RP68 with port function RD4.
59 PWM6L/RD15 output PWM Low Output 6 (PWM6L) with port function RD15.
60 TMS/PWM3H/RP43/RB11 input JTAG test mode select pin (TMS), also PWM High Output 3 (PWM3H), remappable to RP43 with port function RB11.
61 TCK/PWM3L/RP44/RB12 input JTAG test clock input pin (TCK), also PWM Low Output 3 (PWM3L), remappable to RP44 with port function RB12.
62 PWM2H/RP45/RB13 output PWM High Output 2 (PWM2H), remappable to RP45 with port function RB13.
63 PWM2L/RP46/RB14 output PWM Low Output 2 (PWM2L), remappable to RP46 with port function RB14.
64 PWM4H/RP65/RD1 output PWM High Output 4 (PWM4H), remappable to RP65 with port function RD1.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Ambient temperature under bias -40 125 °C 379
Storage temperature -65 150 °C 379
Voltage on VDD with respect to VSS VDD -0.3 4 V 379
Voltage on any pin that is not 5V tolerant with respect to VSS -0.3 V Maximum printed as VDD + 0.3V 379
Voltage on any 5V tolerant pin with respect to VSS when VDD >= 3.0V -0.3 5.5 V VDD >= 3.0V 379
Voltage on any 5V tolerant pin with respect to VSS when VDD < 3.0V -0.3 3.6 V VDD < 3.0V 379
Supply Voltage DC10 VDD 3 3.6 V 381
RAM Retention Voltage DC12 VDR 1.95 V +25°C, +85°C, +125°C 381
RAM Retention Voltage DC12 VDR 2 V -40°C 381
VDD Rise Rate to Ensure Internal Power-on Reset Signal DC17 SVDD 1 V/ms 0V-3V in 3 ms 381
External Filter Capacitor Value CEFC 4.7 10 µF Capacitor must have a low series resistance (<1 Ohm) 381
Operating Junction Temperature Range (Industrial) TJ -40 125 °C Industrial Temperature Devices 380
Operating Ambient Temperature Range (Industrial) TA -40 85 °C Industrial Temperature Devices 380
Maximum MIPS 70 MIPS VDD 3.0V to 3.6V, -40°C to +85°C 380
Power-Down Current (IPD) DC60d 15 110 µA -40°C 3.3V 384
Power-Down Current (IPD) DC60a 20 150 µA +25°C 384
Power-Down Current (IPD) DC60b 150 500 µA +85°C 384
Operating Current (IDD) DC26a 30 46 mA +25°C 3.3V 70 MIPS 382
Operating Current (IDD) DC27a 57 75 mA +25°C 3.3V 70 MIPS (Note 2) 382
Idle Current (IIDLE) DC46a 10 20 mA +25°C 3.3V 70 MIPS 383
Cell Endurance D130 10000 E/W -40C to +125C 390
VDD for Read D131 3 3.6 V 390
VDD for Self-Timed Write D132b 3 3.6 V 390
Characteristic Retention D134 TRETD 20 Year Provided no other specifications are violated, -40C to +125C 390
Supply Current during Programming D135 IDDP 10 mA 390
Instantaneous Peak Current During Start-up D136 IPEAK 150 mA 390
Page Erase Time D137a TPE 19.7 20.1 ms TPE = 146893 FRC cycles, TA = +85°C 390
Page Erase Time D137b TPE 19.5 20.3 ms TPE = 146893 FRC cycles, TA = +125°C 390
Package Thermal Resistance, 64-Pin TQFP 10x10x1 mm θJA 49 °C/W Junction to ambient, achieved by package simulations 380

CAD (KiCad official)

  • Symbol: dsPIC33EP128GS806-I
  • Footprint: Package_QFP:TQFP-64_10x10mm_P0.5mm
  • 3D model: TQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: dspic33ep128gs806-i-etched.step / dspic33ep128gs806-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dspic33ep128gs806-i.step / dspic33ep128gs806-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (484 pp, sha256 ee1eb16317dd854d, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF