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dsPIC33EP128GP504-I

Microchip Tech · Digital Signal Processors / Controllers (DSPs/DSCs) · TQFP-44(10x10)

dsPIC33EP128GP504-I from Microchip Tech, in a TQFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TMS/ASDA1/SDI1/RP41/RB9 bidirectional 5V-tolerant PORTB I/O shared with JTAG TMS, alternate I2C1 data, SPI1 data in and remappable RP41; an internal pull-up is connected to TMS when JTAG is active.
2 RP54/RC6 bidirectional 5V-tolerant PORTC I/O with remappable peripheral pin RP54.
3 RP55/RC7 bidirectional 5V-tolerant PORTC I/O with remappable peripheral pin RP55.
4 RP56/RC8 bidirectional 5V-tolerant PORTC I/O with remappable peripheral pin RP56.
5 RP57/RC9 bidirectional 5V-tolerant PORTC I/O with remappable peripheral pin RP57.
6 VSS power_in Ground reference for logic and I/O pins; must always be connected.
7 VCAP passive CPU logic filter capacitor connection; must not connect to VDD and needs a low-ESR (<1 Ohm) capacitor greater than 4.7 uF (10 uF recommended) to ground.
8 RP42/RB10 bidirectional 5V-tolerant PORTB I/O with remappable peripheral pin RP42.
9 RP43/RB11 bidirectional 5V-tolerant PORTB I/O with remappable peripheral pin RP43.
10 RPI44/RB12 bidirectional 5V-tolerant PORTB I/O with remappable input-only pin RPI44.
11 RPI45/CTPLS/RB13 bidirectional 5V-tolerant PORTB I/O with remappable input RPI45 and CTMU pulse output CTPLS.
12 TDO/RA10 bidirectional 5V-tolerant PORTA I/O shared with JTAG test data output TDO.
13 TDI/RA7 bidirectional 5V-tolerant PORTA I/O shared with JTAG test data input TDI.
14 RPI46/T3CK/RB14 bidirectional 5V-tolerant PORTB I/O with remappable input RPI46 and Timer3 external clock input.
15 RPI47/T5CK/RB15 bidirectional 5V-tolerant PORTB I/O with remappable input RPI47 and Timer5 external clock input.
16 AVSS power_in Ground reference for analog modules; must be connected at all times.
17 AVDD power_in Positive supply for analog modules; must be connected at all times.
18 MCLR input Active-low Master Clear (Reset) input, 5V tolerant, also used for device programming and debugging.
19 AN0/OA2OUT/RA0 bidirectional PORTA I/O with analog input AN0 and Op Amp 2 output OA2OUT.
20 AN1/C2IN1+/RA1 bidirectional PORTA I/O with analog input AN1 and Op Amp/Comparator 2 positive input C2IN1+.
21 PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0 bidirectional PORTB I/O with ICSP data channel 3, ADC negative reference VREF-, analog input AN2, comparator 2 negative input, SPI1 slave select, RPI32 and CTMU edge input 2.
22 PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1 bidirectional PORTB I/O with ICSP clock channel 3, ADC positive reference VREF+, analog input AN3, Op Amp 1 output, RPI33 and CTMU edge input 1.
23 PGEC1/AN4/C1IN1+/RPI34/RB2 bidirectional PORTB I/O with ICSP clock channel 1, analog input AN4, Op Amp/Comparator 1 positive input and RPI34.
24 PGED1/AN5/C1IN1-/RP35/RB3 bidirectional PORTB I/O with ICSP data channel 1, analog input AN5, Op Amp/Comparator 1 negative input and RP35.
25 AN6/OA3OUT/C4IN1+/OCFB/RC0 bidirectional PORTC I/O with analog input AN6, Op Amp 3 output, Comparator 4 positive input and Output Compare Fault B input.
26 AN7/C3IN1-/C4IN1-/RC1 bidirectional PORTC I/O with analog input AN7 and Comparator 3 and Comparator 4 negative inputs.
27 AN8/C3IN1+/U1RTS/BCLK1/RC2 bidirectional PORTC I/O with analog input AN8, Op Amp/Comparator 3 positive input, UART1 Ready-to-Send and UART1 IrDA baud clock output.
28 VDD power_in Positive supply for peripheral logic and I/O pins; must be connected, 3.0V to 3.6V operation.
29 VSS power_in Ground reference for logic and I/O pins; must always be connected.
30 OSC1/CLKI/RA2 bidirectional Oscillator crystal input or external clock input CLKI, shared with PORTA I/O RA2.
31 OSC2/CLKO/RA3 bidirectional Oscillator crystal output or CLKO in RC and EC modes, shared with PORTA I/O RA3.
32 SDA2/RPI24/RA8 bidirectional 5V-tolerant PORTA I/O with I2C2 data, and remappable input RPI24.
33 SCL2/RP36/RB4 bidirectional 5V-tolerant PORTB I/O with I2C2 clock and remappable pin RP36.
34 CVREF2O/SDO1/RP20/T1CK/RA4 bidirectional PORTA I/O with comparator reference divided-by-2 output CVREF2O, SPI1 data out, RP20 and Timer1 external clock input.
35 SDI1/RPI25/RA9 bidirectional PORTA I/O with SPI1 data in and remappable input RPI25.
36 SCK1/RPI51/RC3 bidirectional 5V-tolerant PORTC I/O with SPI1 clock and remappable input RPI51.
37 SDA1/RPI52/RC4 bidirectional 5V-tolerant PORTC I/O with I2C1 data and remappable input RPI52.
38 SCL1/RPI53/RC5 bidirectional 5V-tolerant PORTC I/O with I2C1 clock and remappable input RPI53.
39 VSS power_in Ground reference for logic and I/O pins; must always be connected.
40 VDD power_in Positive supply for peripheral logic and I/O pins; must be connected, 3.0V to 3.6V operation.
41 PGED2/ASDA2/RP37/RB5 bidirectional 5V-tolerant PORTB I/O with ICSP data channel 2, alternate I2C2 data and RP37.
42 PGEC2/ASCL2/RP38/RB6 bidirectional 5V-tolerant PORTB I/O with ICSP clock channel 2, alternate I2C2 clock and RP38.
43 RP39/INT0/RB7 bidirectional PORTB I/O with remappable pin RP39 and External Interrupt 0 (INT0 is not remappable).
44 TCK/CVREF1O/ASCL1/RP40/T4CK/RB8 bidirectional PORTB I/O with JTAG test clock TCK, comparator reference output CVREF1O, alternate I2C1 clock, RP40 and Timer4 external clock input.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-44(10x10)
Category Single Chip Microcomputer/Microcontroller
Pins 44

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating supply voltage 3 3.6 V -40°C to +85°C, DC to 70 MIPS 1
Operating temperature range -40 85 °C 3.0V to 3.6V, DC to 70 MIPS 1
Internal oscillator tolerance -1 1 % 1
Dynamic current 0.6 mA/MHz typical 1
Power-down current IPD 30 µA typical 1

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PPS Cover Section • Adds Peripheral Pin Select (PPS) to allow Digital Function Remapping and Change 530

CAD (KiCad official)

  • Symbol: dsPIC33EP128GP504-I
  • Footprint: Package_QFP:TQFP-44_10x10mm_P0.8mm
  • 3D model: TQFP-44(10x10) (KiCad packages3D, STEP)
  • 3D model files: dspic33ep128gp504-i-etched.step / dspic33ep128gp504-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dspic33ep128gp504-i.step / dspic33ep128gp504-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (546 pp, sha256 ee605a134379ee11, retrieved 2026-11-08, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF