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DSPIC33CK64MC105T-I/PT

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Microchip Tech Digital Signal Processors / Controllers (DSPs/DSCs), TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentsingle chip microcomputer-microcontrollerdspic33ck64mc105t-ifactory-2.0.0extractor-text

Verified DSPIC33CK64MC105T-I/PT

by Ray · last 13 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

13 Nov 2026RayPublished by the parts factory: tier mfr, 48 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • •array (skip): not an array of element pairs
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: DSPIC33CK64MC105T-I/PT · TQFP-48(7x7) · 48 pins
  • ✓copper: 48 copper pads, none touching another net
  • ✓datasheet: all 48 pin names found in the 518-page datasheet
  • ✓distributor: lcsc C5225949, digikey 150-DSPIC33CK64MC105T-I/PTCT-ND, mouser 579-3CK64MC105T-I/PT
  • ✓family: TQFP-48_7x7mm_P0.5mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-v5mkamm3/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.498)
  • ✓pads: 48 pins = 48 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 48 pins agree
  • ✓symbol_text: no pin names collide
  • ✓viewers: viewers/footprint.html 59 kB, viewers/symbol.html 34 kB
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ dspic33ck64mc105t-i-pt.kicad_sym✓ dspic33ck64mc105t-i-pt.kicad_mod✓ dspic33ck64mc105t-i-pt.step
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Contents

README

markdown

DSPIC33CK64MC105T-I

Microchip Tech · Digital Signal Processors / Controllers (DSPs/DSCs) · TQFP-48(7x7)

DSPIC33CK64MC105T-I from Microchip Tech, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RP46/PWM1H/RB14 bidirectional PORTB bit 14 I/O with remappable pin RP46 and PWM1H output.
2 RP47/PWM1L/RB15 bidirectional PORTB bit 15 I/O with remappable pin RP47 and PWM1L output.
3 RP60/RC12 bidirectional PORTC bit 12 I/O with remappable pin RP60.
4 RP61/RC13 bidirectional PORTC bit 13 I/O with remappable pin RP61.
5 MCLR input Master Clear active-low Reset input, also used for device programming and debugging.
6 ANN0/RP77/RD13 bidirectional Analog negative input ANN0 (48-pin only, for differential ADC mode), remappable pin RP77 and PORTD bit 13 I/O.
7 AN12/RP48/RC0 bidirectional Analog input AN12, remappable pin RP48 and PORTC bit 0 I/O.
8 OA1OUT/AN0/CMP1A/IBIAS0/RA0 bidirectional Op amp 1 output, analog input AN0, comparator 1 channel A, 50 µA constant-current output IBIAS0 and PORTA bit 0 I/O.
9 OA1IN-/RA1 bidirectional Op amp 1 inverting input and PORTA bit 1 I/O.
10 OA1IN+/AN9/RA2 bidirectional Op amp 1 non-inverting input, analog input AN9 and PORTA bit 2 I/O.
11 DACOUT/AN3/CMP1C/RA3 bidirectional DAC output voltage, analog input AN3, comparator 1 channel C and PORTA bit 3 I/O.
12 OA3OUT/AN4/IBIAS3/RA4 bidirectional Op amp 3 output, analog input AN4, 50 µA constant-current output IBIAS3 and PORTA bit 4 I/O.
13 AVDD power_in Positive supply for analog modules; must be connected at all times.
14 AVSS power_in Ground reference for analog modules; must be connected at all times.
15 OA3IN-/AN13/CMP1B/ISRC0/RP49/RC1 bidirectional Op amp 3 inverting input, analog input AN13, comparator 1 channel B, 10 µA constant-current output ISRC0, remappable pin RP49 and PORTC bit 1 I/O.
16 OA3IN+/AN14/ISRC1/RP50/RC2 bidirectional Op amp 3 non-inverting input, analog input AN14, 10 µA constant-current output ISRC1, remappable pin RP50 and PORTC bit 2 I/O.
17 IBIAS1/RP54/RC6 bidirectional 50 µA constant-current output IBIAS1, remappable pin RP54 and PORTC bit 6 I/O.
18 VDD power_in Positive supply for peripheral logic and I/O pins.
19 VSS power_in Ground reference for logic and I/O pins.
20 AN15/IBIAS2/RP51/RC3 bidirectional Analog input AN15, 50 µA constant-current output IBIAS2, remappable pin RP51 and PORTC bit 3 I/O.
21 OSCI/CLKI/AN5/RP32/RB0 bidirectional Oscillator crystal input or external clock input, analog input AN5, remappable pin RP32 and PORTB bit 0 I/O.
22 OSCO/CLKO/AN6/RP33/RB1 bidirectional Oscillator crystal output or CPU clock output, analog input AN6, remappable pin RP33 and PORTB bit 1 I/O with increased current drive strength; toggled during programming.
23 ISRC3/RP74/RD10 bidirectional 10 µA constant-current output ISRC3, remappable pin RP74 and PORTD bit 10 I/O.
24 ISRC2/RP55/RC7 bidirectional 10 µA constant-current output ISRC2, remappable pin RP55 and PORTC bit 7 I/O.
25 OA2OUT/AN1/AN7/CMP1D/RP34/INT0/RB2 bidirectional Op amp 2 output, analog inputs AN1/AN7 (sharing this pin), comparator 1 channel D, remappable pin RP34, external interrupt 0 and PORTB bit 2 I/O.
26 PGD2/OA2IN-/AN8/RP35/RB3 bidirectional Programming/debugging data I/O channel 2, op amp 2 inverting input, analog input AN8, remappable pin RP35 and PORTB bit 3 I/O.
27 PGC2/OA2IN+/RP36/RB4 bidirectional Programming/debugging clock input channel 2, op amp 2 non-inverting input, remappable pin RP36 and PORTB bit 4 I/O.
28 RP56/ASDA1/SCK2/RC8 bidirectional Remappable pin RP56, alternate I2C1 data, SPI2 clock and PORTC bit 8 I/O with increased current drive strength.
29 RP57/ASCL1/SDI2/RC9 bidirectional Remappable pin RP57, alternate I2C1 clock, SPI2 data in and PORTC bit 9 I/O with increased current drive strength.
30 RP72/SDO2/PCI19/RD8 bidirectional Remappable pin RP72, SPI2 data out, PWM input PCI19 and PORTD bit 8 I/O with increased current drive strength.
31 VSS power_in Ground reference for logic and I/O pins.
32 VDD power_in Positive supply for peripheral logic and I/O pins.
33 PGD3/RP37/RB5 bidirectional Programming/debugging data I/O channel 3, remappable pin RP37 and PORTB bit 5 I/O.
34 PGC3/RP38/RB6 bidirectional Programming/debugging clock input channel 3, remappable pin RP38 and PORTB bit 6 I/O.
35 TDO/AN2/RP39/RB7 bidirectional JTAG test data output, analog input AN2, remappable pin RP39 and PORTB bit 7 I/O.
36 PGD1/AN10/RP40/SCL1/RB8 bidirectional Programming/debugging data I/O channel 1, analog input AN10, remappable pin RP40, I2C1 clock and PORTB bit 8 I/O.
37 PGC1/AN11/RP41/SDA1/RB9 bidirectional Programming/debugging clock input channel 1, analog input AN11, remappable pin RP41, I2C1 data and PORTB bit 9 I/O.
38 RP52/RC4 bidirectional Remappable pin RP52 and PORTC bit 4 I/O.
39 RP53/RC5 bidirectional Remappable pin RP53 and PORTC bit 5 I/O.
40 RP58/RC10 bidirectional Remappable pin RP58 and PORTC bit 10 I/O.
41 RP59/RC11 bidirectional Remappable pin RP59 and PORTC bit 11 I/O.
42 VSS power_in Ground reference for logic and I/O pins.
43 VDD power_in Positive supply for peripheral logic and I/O pins.
44 RP65/PWM4H/RD1 bidirectional Remappable pin RP65, PWM4H output and PORTD bit 1 I/O.
45 TMS/RP42/PWM3H/RB10 bidirectional JTAG test mode select, remappable pin RP42, PWM3H output and PORTB bit 10 I/O; a pull-up is connected during programming or when JTAG is enabled (limits max voltage to 3.6V), otherwise max voltage can reach 5.5V.
46 TCK/RP43/PWM3L/RB11 bidirectional JTAG test clock input, remappable pin RP43, PWM3L output and PORTB bit 11 I/O.
47 TDI/RP44/PWM2H/RB12 bidirectional JTAG test data input, remappable pin RP44, PWM2H output and PORTB bit 12 I/O.
48 RP45/PWM2L/RB13 bidirectional Remappable pin RP45, PWM2L output and PORTB bit 13 I/O.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-48(7x7)
Category Single Chip Microcomputer/Microcontroller
Pins 48

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Ambient temperature under bias -40 125 °C 447
Storage temperature -65 150 °C 447
Voltage on VDD with respect to VSS VDD -0.3 4 V 447
Voltage on any pin that is not 5V tolerant with respect to VSS -0.3 V Max printed as VDD + 0.3V 447
Voltage on any 5V tolerant pin with respect to VSS -0.3 5.5 V 447
VDD Supply Voltage DC10 VDD 3 3.6 V 448
Maximum CPU Clock Frequency 100 MHz VDD 3.0V to 3.6V, -40°C to +125°C 448
Operating Ambient Temperature Range (Industrial) TA -40 85 °C Industrial Temperature Devices 448
Operating Junction Temperature Range (Industrial) TJ -40 125 °C Industrial Temperature Devices 448
VDD Rise Rate to ensure internal Power-on Reset signal SVDD 0.03 V/ms 0V-3V in 100 ms 448
BOR Event on VDD Transition High-to-Low VBOR 2.68 2.99 V 448
Junction to ambient thermal resistance, 48-Pin TQFP 7x7 mm JA 62.76 °C/W Package simulation 448
Operating current (IDD) at -40°C IDD 5.5 6.6 mA -40°C, 3.3V, 10 MIPS (N = 1, N2 = 5, N3 = 2, M = 50, FVCO = 400 MHz, FPLLO = 40 MHz) 449
Operating current (IDD) at +25°C IDD 5.2 6.4 mA +25°C, 3.3V, 10 MIPS (N = 1, N2 = 5, N3 = 2, M = 50, FVCO = 400 MHz, FPLLO = 40 MHz) 449
Operating current (IDD) at +85°C IDD 5.7 11.9 mA +85°C, 3.3V, 10 MIPS (N = 1, N2 = 5, N3 = 2, M = 50, FVCO = 400 MHz, FPLLO = 40 MHz) 449
Operating current (IDD) at -40°C IDD 7.1 8.4 mA -40°C, 3.3V, 20 MIPS (N = 1, N2 = 5, N3 = 1, M = 60, FVCO = 480 MHz, FPLLO = 280 MHz) 449
Operating current (IDD) at +25°C IDD 7.1 8.1 mA +25°C, 3.3V, 20 MIPS (N = 1, N2 = 5, N3 = 1, M = 60, FVCO = 480 MHz, FPLLO = 280 MHz) 449
Operating current (IDD) at +85°C IDD 7.5 13.4 mA +85°C, 3.3V, 20 MIPS (N = 1, N2 = 5, N3 = 1, M = 60, FVCO = 480 MHz, FPLLO = 280 MHz) 449
Operating current (IDD) at -40°C IDD 10.6 12.6 mA -40°C, 3.3V, 40 MIPS (N = 1, N2 = 3, N3 = 1, M = 60, FVCO = 480 MHz, FPLLO = 160 MHz) 449
Operating current (IDD) at +25°C IDD 10.3 12.3 mA +25°C, 3.3V, 40 MIPS (N = 1, N2 = 3, N3 = 1, M = 60, FVCO = 480 MHz, FPLLO = 160 MHz) 449
Operating current (IDD) at +85°C IDD 11.6 17.1 mA +85°C, 3.3V, 40 MIPS (N = 1, N2 = 3, N3 = 1, M = 60, FVCO = 480 MHz, FPLLO = 160 MHz) 449
Operating current (IDD) at -40°C IDD 15.4 18 mA -40°C, 3.3V, 70 MIPS (N = 1, N2 = 2, N3 = 1, M = 70, FVCO = 560 MHz, FPLLO = 280 MHz) 449
Operating current (IDD) at +25°C IDD 15.2 17.4 mA +25°C, 3.3V, 70 MIPS (N = 1, N2 = 2, N3 = 1, M = 70, FVCO = 560 MHz, FPLLO = 280 MHz) 449
Operating current (IDD) at +85°C IDD 16 22 mA +85°C, 3.3V, 70 MIPS (N = 1, N2 = 2, N3 = 1, M = 70, FVCO = 560 MHz, FPLLO = 280 MHz) 449
Operating current (IDD) at -40°C IDD 19 22.5 mA -40°C, 3.3V, 90 MIPS (N = 1, N2 = 2, N3 = 1, M = 90, FVCO = 720 MHz, FPLLO = 360 MHz) 449
Operating current (IDD) at +25°C IDD 18.9 21.6 mA +25°C, 3.3V, 90 MIPS (N = 1, N2 = 2, N3 = 1, M = 90, FVCO = 720 MHz, FPLLO = 360 MHz) 449
Operating current (IDD) at +85°C IDD 19.7 26 mA +85°C, 3.3V, 90 MIPS (N = 1, N2 = 2, N3 = 1, M = 90, FVCO = 720 MHz, FPLLO = 360 MHz) 449
Operating current (IDD) at -40°C IDD 20.7 22.4 mA -40°C, 3.3V, 100 MIPS (N = 1, N2 = 1, N3 = 1, M = 50, FVCO = 400 MHz, FPLLO = 400 MHz) 449
Operating current (IDD) at +25°C IDD 20.7 21.5 mA +25°C, 3.3V, 100 MIPS (N = 1, N2 = 1, N3 = 1, M = 50, FVCO = 400 MHz, FPLLO = 400 MHz) 449
Operating current (IDD) at +85°C IDD 21.4 25.4 mA +85°C, 3.3V, 100 MIPS (N = 1, N2 = 1, N3 = 1, M = 50, FVCO = 400 MHz, FPLLO = 400 MHz) 449
Op Amp delta current at -40°C DC140 0.21 0.42 mA -40°C, 3.3V, one op amp instance 453
Op Amp delta current at +25°C DC140 0.22 0.44 mA +25°C, 3.3V, one op amp instance 453
Op Amp delta current at +85°C DC140 0.23 0.52 mA +85°C, 3.3V, one op amp instance 453
Input Current with Pull-up Resistor Enabled ICNPU 175 545 µA VDD = 3.3V, VPIN = VSS 454
Input Current with Pull-Down Resistor Enabled ICNPD 65 360 µA VDD = 3.3V, VPIN = VDD 454
Input Leakage Current, I/O pins and MCLR IIL -700 nA VPIN = VSS 454
Input Leakage Current, I/O pins and MCLR IIL 700 nA VPIN = VDD 454
Input Low Injection Current IICL 0 -5 mA This parameter applies to all pins 455
Input High Injection Current IICH 0 5 mA This parameter applies to all pins, except all 5V tolerant pins 455
Total Input Injection Current (sum of all I/O and control pins) IICT -20 20 mA Absolute instantaneous sum of all ± input injection currents from all I/O pins 455
Cell Endurance D130 EP 10000 E/W 456
Characteristic Retention D134 TRETD 20 Year 456
Self-Timed Page Erase Time D137a TPE 20 ms 456
Self-Timed Chip Erase Time D137b TCE 20 ms 456
Self-Timed Double-Word Write Cycle Time D138a TWW 20 µs 6 bytes, data are not all '1's 456
Self-Timed Row Write Cycle Time D138b TRW 1.28 ms 384 bytes, data are not all '1's 456
Port Output Rise Time DO31 TIOR 10 ns Characterized, not tested in manufacturing 458
Port Output Fall Time DO32 TIOF 10 ns Characterized, not tested in manufacturing 458
Op Amp Input Offset Voltage (NCHDISx = 0) OAMP3 VIOFF -15 5 15 mV NCHDISx = 0 474
Op Amp Input Offset Voltage (NCHDISx = 1) OAMP3 VIOFF -20 20 mV NCHDISx = 1 474

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PPS bit 10-8 CLKSEL[2:0]: CCPx Time Base Clock Select bits 111 = PPS TxCK input 338

CAD (KiCad official)

  • Symbol: DSPIC33CK64MC105T-I
  • Footprint: Package_QFP:TQFP-48_7x7mm_P0.5mm
  • 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: dspic33ck64mc105t-i-pt-etched.step / dspic33ck64mc105t-i-pt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dspic33ck64mc105t-i-pt.step / dspic33ck64mc105t-i-pt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (518 pp, sha256 4338a95fb856f719, retrieved 2026-11-13, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF