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DSPIC33CK64MC102-I

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Microchip Tech Digital Signal Processors / Controllers (DSPs/DSCs), SSOP-28. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DSPIC33CK64MC102-I

Microchip Tech · Digital Signal Processors / Controllers (DSPs/DSCs) · SSOP-28

DSPIC33CK64MC102-I from Microchip Tech, in a SSOP-28. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OA1IN-/RA1 bidirectional Op Amp 1 inverting input shared with PORTA bit RA1 general-purpose I/O.
2 OA1IN+/AN9/RA2 bidirectional Op Amp 1 non-inverting input, analog input AN9 and PORTA bit RA2 I/O.
3 DACOUT/AN3/CMP1C/RA3 bidirectional DAC output voltage, analog input AN3, Comparator 1 channel C input and PORTA bit RA3 I/O.
4 AN4/IBIAS3/RA4 bidirectional Analog input AN4, 50 µA constant-current output IBIAS3 and PORTA bit RA4 I/O.
5 AVDD power_in Positive supply for analog modules; must be connected at all times.
6 AVSS power_in Ground reference for analog modules; must be connected at all times.
7 VDD power_in Positive supply for peripheral logic and I/O pins.
8 VSS power_in Ground reference for logic and I/O pins.
9 OSCI/CLKI/AN5/RP32/RB0 bidirectional Oscillator crystal input or external clock input, analog input AN5, remappable pin RP32 and PORTB bit RB0 I/O.
10 OSCO/CLKO/AN6/RP33/RB1 bidirectional Oscillator crystal output or clock output, analog input AN6, remappable pin RP33 and PORTB bit RB1 I/O with increased current drive strength; toggled during programming.
11 OA2OUT/AN1/AN7/CMP1D/RP34/INT0/RB2 bidirectional Op Amp 2 output, analog inputs AN1/AN7, Comparator 1 channel D input, RP34, external interrupt INT0 and PORTB bit RB2 I/O.
12 PGD2/OA2IN-/AN8/RP35/RB3 bidirectional Programming/debugging data I/O channel 2, Op Amp 2 inverting input, analog input AN8, RP35 and PORTB bit RB3 I/O.
13 PGC2/OA2IN+/RP36/RB4 bidirectional Programming/debugging clock input channel 2, Op Amp 2 non-inverting input, RP36 and PORTB bit RB4 I/O.
14 PGD3/RP37/RB5 bidirectional Programming/debugging data I/O channel 3, remappable pin RP37 and PORTB bit RB5 I/O.
15 PGC3/RP38/RB6 bidirectional Programming/debugging clock input channel 3, remappable pin RP38 and PORTB bit RB6 I/O.
16 TDO/AN2/RP39/RB7 bidirectional JTAG test data output, analog input AN2, remappable pin RP39 and PORTB bit RB7 I/O.
17 PGD1/AN10/RP40/SCL1/RB8 bidirectional Programming/debugging data I/O channel 1, analog input AN10, RP40, I2C1 clock SCL1 and PORTB bit RB8 I/O.
18 PGC1/AN11/RP41/SDA1/RB9 bidirectional Programming/debugging clock input channel 1, analog input AN11, RP41, I2C1 data SDA1 and PORTB bit RB9 I/O.
19 VSS power_in Ground reference for logic and I/O pins.
20 VDD power_in Positive supply for peripheral logic and I/O pins.
21 TMS/RP42/PWM3H/RB10 bidirectional JTAG test mode select, RP42, PWM3H output and PORTB bit RB10 I/O; a pull-up is connected during programming or when JTAG is enabled, limiting the maximum voltage to 3.6V (5.5V if JTAG is disabled).
22 TCK/RP43/PWM3L/RB11 bidirectional JTAG test clock input, RP43, PWM3L output and PORTB bit RB11 I/O.
23 TDI/RP44/PWM2H/RB12 bidirectional JTAG test data input, RP44, PWM2H output and PORTB bit RB12 I/O.
24 RP45/PWM2L/RB13 bidirectional Remappable pin RP45, PWM2L output and PORTB bit RB13 I/O.
25 RP46/PWM1H/RB14 bidirectional Remappable pin RP46, PWM1H output and PORTB bit RB14 I/O.
26 RP47/PWM1L/RB15 bidirectional Remappable pin RP47, PWM1L output and PORTB bit RB15 I/O.
27 MCLR input Master Clear input; active-low Reset to the device.
28 OA1OUT/AN0/CMP1A/IBIAS0/RA0 bidirectional Op Amp 1 output, analog input AN0, Comparator 1 channel A input, 50 µA constant-current output IBIAS0 and PORTA bit RA0 I/O.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SSOP-28
Category Single Chip Microcomputer/Microcontroller
Pins 28

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PPS bit 10-8 CLKSEL[2:0]: CCPx Time Base Clock Select bits 111 = PPS TxCK input 340

CAD (KiCad official)

  • Symbol: DSPIC33CK64MC102-I
  • Footprint: Package_SO:SSOP-28_5.3x10.2mm_P0.65mm
  • 3D model: SSOP-28 (KiCad packages3D, STEP)
  • 3D model files: dspic33ck64mc102-i-etched.step / dspic33ck64mc102-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dspic33ck64mc102-i.step / dspic33ck64mc102-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (520 pp, sha256 12a85acf4f2aa06c, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF