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DSPIC33CK512MP605-E

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Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentsingle chip microcomputer-microcontrollerdspic33ck512mp605-efactory-2.0.0extractor-text

Verified DSPIC33CK512MP605-E

by Ray · last 9 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

9 Nov 2026RayPublished by the parts factory: tier mfr, 48 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: DSPIC33CK512MP605-E · TQFP-48(7x7) · 48 pins
  • ✓copper: 48 copper pads, none touching another net
  • ✓datasheet: all 48 pin names found in the 1071-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: TQFP-48_7x7mm_P0.5mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-zjix6lx0/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 48 pins = 48 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 48 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ dspic33ck512mp605-e.kicad_sym✓ dspic33ck512mp605-e.kicad_mod✓ dspic33ck512mp605-e.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray
viewers dspic33ck512mp605-e: viewers · Ray
dspic33ck512mp605-e-etched.glb Publish 0.1.0 · Ray
dspic33ck512mp605-e-etched.step dspic33ck512mp605-e: factory component page (tier=mfr) · Ray
dspic33ck512mp605-e-hero.glb dspic33ck512mp605-e: hero GLB from the etched model (keeps the MPN mark) · Ray
dspic33ck512mp605-e-hero.overlay.json Publish 0.1.0 · Ray
dspic33ck512mp605-e.glb Publish 0.1.0 · Ray
dspic33ck512mp605-e.kicad_mod Publish 0.1.0 · Ray
dspic33ck512mp605-e.kicad_sym Publish 0.1.0 · Ray
dspic33ck512mp605-e.lbr Publish 0.1.0 · Ray
dspic33ck512mp605-e.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json Set visibility: public · Ray
README.md Publish 0.1.0 · Ray
verification.json Verified: Published by the parts factory: tier mfr, 48 pins · Ray

DSPIC33CK512MP605-E

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · TQFP-48(7x7)

DSPIC33CK512MP605-E from Microchip Tech, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RB14 bidirectional Shared with RP46/PWM1H; shaded 5V-tolerant digital I/O pin RB14.
2 RB15 bidirectional Shared with RP47/PWM1L; shaded 5V-tolerant digital I/O pin RB15.
3 RC12 bidirectional Shared with RP60/PWM8H; shaded 5V-tolerant digital I/O pin RC12.
4 RC13 bidirectional Shared with RP61/PWM8L; shaded 5V-tolerant digital I/O pin RC13.
5 MCLR input Active-low Master Clear (Reset) input, also used for device programming and debugging; 5V tolerant.
6 RD13 bidirectional Digital I/O RD13 shared with analog ANN4/CMP5B and remappable RP77.
7 RC0 bidirectional Digital I/O RC0 shared with analog AN12/ANN0 and remappable RP48.
8 RA0 bidirectional Digital I/O RA0 shared with OA1OUT/AN0/CMP1A/IBIAS0.
9 RA1 bidirectional Digital I/O RA1 shared with OA1IN-/ANA1.
10 RA2 bidirectional Digital I/O RA2 shared with OA1IN+/AN9.
11 RA3 bidirectional Digital I/O RA3 shared with DACOUT1/AN27/AN3/CMP1C.
12 RA4 bidirectional Digital I/O RA4 shared with OA3OUT/AN4/ANB1/ANB2/CMP3B/IBIAS3.
13 AVDD power_in Positive supply for analog modules; must be connected at all times.
14 AVSS power_in Ground reference for analog modules; must be connected at all times.
15 RC1 bidirectional Digital I/O RC1 shared with OA3IN-/AN13/CMP1B/ISRC0/RP49.
16 RC2 bidirectional Digital I/O RC2 shared with OA3IN+/AN14/CMP2B/ISRC1/RP50.
17 RC6 bidirectional Digital I/O RC6 shared with AN17/ANN1/CMP4B/IBIAS1/RP54.
18 VDD power_in Positive supply for peripheral logic and I/O pins.
19 VSS power_in Ground reference for logic and I/O pins.
20 RC3 bidirectional Digital I/O RC3 shared with AN15/ANN2/CMP2A/IBIAS2/RP51.
21 RB0 bidirectional Digital I/O RB0 shared with OSCI/CLKI (oscillator input or external clock input), AN5 and RP32.
22 RB1 bidirectional Digital I/O RB1 shared with OSCO/CLKO (oscillator output), AN6 and RP33; toggled during programming.
23 RD10 bidirectional Digital I/O RD10 shared with AN18/ANC2/CMP3C/ISRC3/RP74.
24 RC7 bidirectional Digital I/O RC7 shared with DACOUT2/AN16/CMP4C/ISRC2/RP55.
25 RB2 bidirectional Digital I/O RB2 shared with OA2OUT/AN1/AN7/ANA0/ANA2/ANA3/CMP1D-CMP6D, RP34, SCL3 and INT0.
26 RB3 bidirectional Digital I/O RB3 shared with PGD2 (programming data), OA2IN-/AN8/CMP4A and RP35.
27 RB4 bidirectional Digital I/O RB4 shared with PGC2 (programming clock), OA2IN+ and RP36.
28 RC8 bidirectional Shaded 5V-tolerant I/O RC8 shared with RP56/ASDA1/SCK2.
29 RC9 bidirectional Shaded 5V-tolerant I/O RC9 shared with RP57/ASCL1/SDI2.
30 RD8 bidirectional Shaded 5V-tolerant I/O RD8 shared with RP72/SDO2/PCI19.
31 VSS power_in Ground reference for logic and I/O pins.
32 VDD power_in Positive supply for peripheral logic and I/O pins.
33 RB5 bidirectional Shaded 5V-tolerant I/O RB5 shared with PGD3 (programming data), RP37/PWM6L/SDA2.
34 RB6 bidirectional Shaded 5V-tolerant I/O RB6 shared with PGC3 (programming clock), RP38/PWM6H/SCL2.
35 RB7 bidirectional Digital I/O RB7 shared with TDO (JTAG test data out), AN2/AN26/CMP3A, RP39 and SDA3.
36 RB8 bidirectional Digital I/O RB8 shared with PGD1 (programming data), AN10/CMP6A, RP40 and SCL1.
37 RB9 bidirectional Digital I/O RB9 shared with PGC1 (programming clock), AN11/CMP5A, RP41 and SDA1.
38 RC4 bidirectional Shaded 5V-tolerant I/O RC4 shared with RP52/PWM5H/ASDA2.
39 RC5 bidirectional Shaded 5V-tolerant I/O RC5 shared with RP53/PWM5L/ASCL2.
40 RC10 bidirectional Shaded 5V-tolerant I/O RC10 shared with RP58/PWM7H.
41 RC11 bidirectional Shaded 5V-tolerant I/O RC11 shared with RP59/PWM7L.
42 VSS power_in Ground reference for logic and I/O pins.
43 VDD power_in Positive supply for peripheral logic and I/O pins.
44 RD1 bidirectional Shaded 5V-tolerant I/O RD1 shared with RP65/PWM4H.
45 RB10 bidirectional Shaded I/O RB10 shared with TMS (JTAG test mode select), RP42/PWM3H; pulled up when erased and during programming.
46 RB11 bidirectional Shaded I/O RB11 shared with TCK (JTAG test clock), RP43/PWM3L.
47 RB12 bidirectional Shaded I/O RB12 shared with TDI (JTAG test data in), RP44/PWM2H.
48 RB13 bidirectional Shaded 5V-tolerant I/O RB13 shared with RP45/PWM2L.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-48(7x7)
Category Single Chip Microcomputer/Microcontroller
Pins 48

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage DC10 VDD 3 3.6 V 993
BOR Event on VDD Transition High-to-Low BO10 VBOR 2.68 2.84 2.99 V 993
VDD Rise Rate to Ensure Internal Power-on Reset Signal DC17 SVDD 0.03 V/ms 0V-3V in 100 ms 993
Program Flash Cell Endurance D130 EP 10000 E/W -40°C to +125°C 1004
Program Flash Characteristic Retention D134 TRETD 20 Year Provided no other specifications are violated, -40°C to +125°C 1004
Page Erase Time D137a TPE 15.3 16.82 ms TPE = 128,454 FRC cycles (Note 1) 1004
Operating Ambient Temperature Range (Extended) TA -40 125 °C Extended Temperature Devices 992
Operating Junction Temperature Range (Extended) TJ -40 140 °C Extended Temperature Devices 992
Input Change Notification Pull-up Current DI30 ICNPU 175 360 545 µA VDD = 3.6V, VPIN = VSS 1002
Input Change Notification Pull-Down Current DI31 ICNPD 65 215 360 µA VDD = 3.6V, VPIN = VDD 1002
Input Leakage Current (I/O pins, MCLR, OSCI) DI50 IIL -700 700 nA VPIN = VSS or VDD 1002
Output Low Voltage 4x Sink Driver Pins DO10 VOL 0.42 V VDD = 3.6V, IOL < 9 mA 1003
Output Low Voltage 8x Sink Driver Pins DO10 VOL 0.4 V VDD = 3.6V, IOL < 11 mA 1003
Output High Voltage 4x Source Driver Pins DO20 VOH 2.4 V VDD= 3.6V, IOH > -8 mA 1003
Output High Voltage 8x Source Driver Pins DO20 VOH 2.4 V VDD = 3.6V, IOH > -12 mA 1003
Operating Current (IDD) 100 MIPS at +125°C IDD 29.23 42.5 mA +125°C, 3.3V, 100 MIPS 995
Operating Current (IDD) 100 MIPS at -40°C DC25 IDD 27.14 30.9 mA -40°C 3.3V 100 MIPS 995
Idle Current (IIDLE) 100 MIPS at +125°C DC45 IIDLE 17.5 30 mA +125°C 3.3V 100 MIPS 996
Power-Down Current (IPD) Sleep at -40°C DC60 IPD 270 650 µA -40°C 3.3V 997
Power-Down Current (IPD) Sleep at +25°C DC60 IPD 525 1000 µA +25°C 997
Power-Down Current (IPD) Sleep at +85°C DC60 IPD 2150 7250 µA +85°C 997
Power-Down Current (IPD) Sleep at +125°C DC60 IPD 7.03 18.5 mA +125°C 997
External Clock Input Frequency (EC mode) OS10 FIN 64 MHz EC 1006
Storage Temperature -65 150 °C 991
Ambient Temperature Under Bias -40 125 °C 991
Voltage on VDD with respect to VSS VDD -0.3 4 V 991
Voltage on 5V tolerant pin with respect to VSS when VDD >= 3.0V -0.3 5.5 V VDD >= 3.0V 991
Voltage on 5V tolerant pin with respect to VSS when VDD < 3.0V -0.3 3.6 V VDD < 3.0V 991
Maximum current out of VSS pin 300 mA 991
Maximum current into VDD pin 300 mA 991
Maximum current sunk/sourced by any 4x I/O pin 15 mA 991
Maximum current sunk/sourced by any 8x I/O pin 25 mA 991
Maximum current sunk by a group of I/Os between two VSS pins 75 mA 991
Maximum current sourced by a group of I/Os between two VDD pins 75 mA 991
Maximum current sunk by all ports 200 mA 991
Package Thermal Resistance, 48-Pin TQFP 7x7 mm θJA 62.76 °C/W Junction to ambient, package simulation 992

CAD (KiCad official)

  • Symbol: DSPIC33CK512MP605-E
  • Footprint: Package_QFP:TQFP-48_7x7mm_P0.5mm
  • 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: dspic33ck512mp605-e-etched.step / dspic33ck512mp605-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dspic33ck512mp605-e.step / dspic33ck512mp605-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (1071 pp, sha256 c11699d37228cae3, retrieved 2026-11-09, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF