component
DSPIC33CH512MP208-I
Public Made by Adomby adom
Microchip Tech Pre-ordered MCUs, TQFP-80(12x12). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
Ray
Set visibility: public
44796db
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672
{
"schema_version": 1,
"type": "component",
"slug": "dspic33ch512mp208-i",
"title": "DSPIC33CH512MP208-I",
"brief": "Microchip Tech Pre-ordered MCUs, TQFP-80(12x12). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"embedded processors & controllers",
"dspic33ch512mp208-i",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "DSPIC33CH512MP208-I",
"manufacturer": "Microchip Tech",
"package": "TQFP-80(12x12)",
"pin_count": 80,
"category": "Embedded Processors & Controllers",
"subcategory": "Pre-ordered MCUs",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/306f517690fa9a597626de096bcf5da8.pdf",
"parts": {
"symbol": "dspic33ch512mp208-i.kicad_sym",
"footprint": "dspic33ch512mp208-i.kicad_mod",
"model_3d": "dspic33ch512mp208-i-hero.glb",
"model_3d_plain": "dspic33ch512mp208-i-etched.glb",
"model_3d_step": "dspic33ch512mp208-i-etched.step",
"model_3d_step_plain": "dspic33ch512mp208-i.step",
"lbr": "dspic33ch512mp208-i.lbr"
},
"distributor_links": {
"lcsc": "C1338536"
},
"distributor_check": {
"checked_at": "2026-10-31T04:26:41Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": null,
"status": "no match"
}
},
"pins": [
{
"number": "1",
"name": "RP46/PWM1H/RB14",
"type": "bidirectional",
"description": "Master core function is RP46/PWM1H/RB14 (remappable I/O RP46, PWM1H output, port RB14); slave core alternates are S1RP46/S1RB14."
},
{
"number": "2",
"name": "RE0",
"type": "bidirectional",
"description": "Master core function is port pin RE0; slave core alternate is S1RE0."
},
{
"number": "3",
"name": "RP47/PWM1L/RB15",
"type": "bidirectional",
"description": "Master core function is RP47/PWM1L/RB15 (remappable I/O RP47, PWM1L output, port RB15); slave core alternates are S1RP47/S1RB15."
},
{
"number": "4",
"name": "RE1",
"type": "bidirectional",
"description": "Master core function is port pin RE1; slave core alternate is S1RE1."
},
{
"number": "5",
"name": "RP60/PWM4H/RC12",
"type": "bidirectional",
"description": "Master core function is RP60/PWM4H/RC12 (remappable I/O RP60, PWM4H output, port RC12); slave core alternates are S1RP60/S1RC12."
},
{
"number": "6",
"name": "RP61/PWM4L/RC13",
"type": "bidirectional",
"description": "Master core function is RP61/PWM4L/RC13 (remappable I/O RP61, PWM4L output, port RC13); slave core alternates are S1RP61/S1RC13."
},
{
"number": "7",
"name": "RP62/RC14",
"type": "bidirectional",
"description": "Master core function is RP62/RC14 (remappable I/O RP62, port RC14); slave core alternates are S1RP62/S1PWM7H/S1RC14."
},
{
"number": "8",
"name": "RP63/RC15",
"type": "bidirectional",
"description": "Master core function is RP63/RC15 (remappable I/O RP63, port RC15); slave core alternates are S1RP63/S1PWM7L/S1RC15."
},
{
"number": "9",
"name": "MCLR",
"type": "input",
"description": "Master clear (device reset) input shared by the master and slave cores."
},
{
"number": "10",
"name": "PCI22/RD15",
"type": "bidirectional",
"description": "Master core function is PCI22/RD15 (peripheral change input PCI22, port RD15); slave core alternates are S1PCI22/S1RD15."
},
{
"number": "11",
"name": "VSS",
"type": "power_in",
"description": "Digital ground pin."
},
{
"number": "12",
"name": "VDD",
"type": "power_in",
"description": "Digital supply pin; the datasheet headline operating range is 3V to 3.6V."
},
{
"number": "13",
"name": "PCI21/RD14",
"type": "bidirectional",
"description": "Master core function is PCI21/RD14 (peripheral change input PCI21, port RD14); slave core alternates are S1ANN1/S1PGA2N2/S1PCI21/S1RD14."
},
{
"number": "14",
"name": "RD13",
"type": "bidirectional",
"description": "Master core function is port pin RD13; slave core alternates are S1ANN0/S1PGA1N2/S1RD13."
},
{
"number": "15",
"name": "AN12/IBIAS3/RP48/RC0",
"type": "bidirectional",
"description": "Master core function is AN12/IBIAS3/RP48/RC0 (ADC channel AN12, current bias IBIAS3, remappable RP48, port RC0); slave core alternates are S1AN10/S1RP48/S1RC0."
},
{
"number": "16",
"name": "AN0/CMP1A/RA0",
"type": "bidirectional",
"description": "Master core function is AN0/CMP1A/RA0 (ADC channel AN0, comparator 1 input CMP1A, port RA0); slave core alternate is S1RA0."
},
{
"number": "17",
"name": "RE2",
"type": "bidirectional",
"description": "Master core function is port pin RE2; slave core alternate is S1RE2."
},
{
"number": "18",
"name": "AN1/RA1",
"type": "bidirectional",
"description": "Master core function is AN1/RA1 (ADC channel AN1, port RA1); slave core alternates are S1AN15/S1RA1."
},
{
"number": "19",
"name": "RE3",
"type": "bidirectional",
"description": "Master core function is port pin RE3; slave core alternate is S1RE3."
},
{
"number": "20",
"name": "AN2/RA2",
"type": "bidirectional",
"description": "Master core function is AN2/RA2 (ADC channel AN2, port RA2); slave core alternates are S1AN16/S1RA2."
},
{
"number": "21",
"name": "AN3/IBIAS0/RA3",
"type": "bidirectional",
"description": "Master core function is AN3/IBIAS0/RA3 (ADC channel AN3, current bias IBIAS0, port RA3); slave core alternates are S1AN0/S1CMP1A/S1PGA1P1/S1RA3."
},
{
"number": "22",
"name": "RE4",
"type": "bidirectional",
"description": "Master core function is port pin RE4; slave core alternate is S1RE4."
},
{
"number": "23",
"name": "AN4/IBIAS1/RA4",
"type": "bidirectional",
"description": "Master core function is AN4/IBIAS1/RA4 (ADC channel AN4, current bias IBIAS1, port RA4); slave core alternates are S1MCLR3/S1AN1/S1CMP2A/S1PGA2P1/S1PGA3P2/S1RA4."
},
{
"number": "24",
"name": "RE5",
"type": "bidirectional",
"description": "Master core function is port pin RE5; slave core alternate is S1RE5."
},
{
"number": "25",
"name": "AVDD",
"type": "power_in",
"description": "Analog supply pin."
},
{
"number": "26",
"name": "AVSS",
"type": "power_in",
"description": "Analog ground pin."
},
{
"number": "27",
"name": "RD12",
"type": "bidirectional",
"description": "Master core function is port pin RD12; slave core alternates are S1AN14/S1PGA2P2/S1RD12."
},
{
"number": "28",
"name": "AN13/ISRC0/RP49/RC1",
"type": "bidirectional",
"description": "Master core function is AN13/ISRC0/RP49/RC1 (ADC channel AN13, current source ISRC0, remappable RP49, port RC1); slave core alternates are S1ANA1/S1RP49/S1RC1."
},
{
"number": "29",
"name": "AN14/ISRC1/RP50/RC2",
"type": "bidirectional",
"description": "Master core function is AN14/ISRC1/RP50/RC2 (ADC channel AN14, current source ISRC1, remappable RP50, port RC2); slave core alternates are S1ANA0/S1RP50/S1RC2."
},
{
"number": "30",
"name": "RP54/RC6",
"type": "bidirectional",
"description": "Master core function is RP54/RC6 (remappable I/O RP54, port RC6); slave core alternates are S1AN11/S1CMP1B/S1RP54/S1RC6."
},
{
"number": "31",
"name": "VDD",
"type": "power_in",
"description": "Digital supply pin; the datasheet headline operating range is 3V to 3.6V."
},
{
"number": "32",
"name": "VSS",
"type": "power_in",
"description": "Digital ground pin."
},
{
"number": "33",
"name": "CMP1B/RP51/RC3",
"type": "bidirectional",
"description": "Master core function is CMP1B/RP51/RC3 (comparator 1 input CMP1B, remappable RP51, port RC3); slave core alternates are S1AN8/S1CMP3B/S1RP51/S1RC3."
},
{
"number": "34",
"name": "OSCI/CLKI/AN5/RP32/RB0",
"type": "input",
"description": "Oscillator input pin (OSCI/CLKI), also ADC channel AN5, remappable RP32 and port RB0; slave core alternates are S1AN5/S1RP32/S1RB0."
},
{
"number": "35",
"name": "OSCO/CLKO/AN6/IBIAS2/RP33/RB1",
"type": "output",
"description": "Oscillator output pin (OSCO/CLKO), also ADC channel AN6, current bias IBIAS2, remappable RP33 and port RB1; slave core alternates are S1AN4/S1RP33/S1RB1."
},
{
"number": "36",
"name": "RD11",
"type": "bidirectional",
"description": "Master core function is port pin RD11; slave core alternates are S1AN17/S1PGA1P2/S1RD11."
},
{
"number": "37",
"name": "RE6",
"type": "bidirectional",
"description": "Master core function is port pin RE6; slave core alternates are S1PGA3N2/S1RE6."
},
{
"number": "38",
"name": "ISRC3/RD10",
"type": "bidirectional",
"description": "Master core function is ISRC3/RD10 (current source ISRC3, port RD10); slave core alternates are S1AN13/S1CMP2B/S1RD10."
},
{
"number": "39",
"name": "RE7",
"type": "bidirectional",
"description": "Master core function is port pin RE7; slave core alternate is S1RE7."
},
{
"number": "40",
"name": "AN15/ISRC2/RP55/RC7",
"type": "bidirectional",
"description": "Master core function is AN15/ISRC2/RP55/RC7 (ADC channel AN15, current source ISRC2, remappable RP55, port RC7); slave core alternates are S1AN12/S1RP55/S1RC7."
},
{
"number": "41",
"name": "DACOUT/AN7/CMP1D/RP34/INT0/RB2",
"type": "bidirectional",
"description": "Master core function is DACOUT/AN7/CMP1D/RP34/INT0/RB2 (DAC output, ADC channel AN7, comparator 1 input CMP1D, remappable RP34, external interrupt INT0, port RB2); multiple slave core alternates are listed in Table 6."
},
{
"number": "42",
"name": "RE8",
"type": "bidirectional",
"description": "Master core function is port pin RE8; slave core alternate is S1RE8."
},
{
"number": "43",
"name": "PGD2/AN8/RP35/RB3",
"type": "bidirectional",
"description": "Master core function is PGD2/AN8/RP35/RB3 (programming/debug data PGD2, ADC channel AN8, remappable RP35, port RB3); slave core alternates are S1PGD2/S1AN18/S1CMP3A/S1PGA3P1/S1RP35/S1RB3."
},
{
"number": "44",
"name": "RE9",
"type": "bidirectional",
"description": "Master core function is port pin RE9; slave core alternate is S1RE9."
},
{
"number": "45",
"name": "PGC2/RP36/RB4",
"type": "input",
"description": "Master core function is PGC2/RP36/RB4 (programming/debug clock PGC2, remappable RP36, port RB4); slave core alternates are S1PGC2/S1AN9/S1RP36/S1PWM5L/S1RB4."
},
{
"number": "46",
"name": "RP56/ASDA1/SCK2/RC8",
"type": "bidirectional",
"description": "Master core function is RP56/ASDA1/SCK2/RC8 (remappable RP56, alternate serial data ASDA1, SPI2 clock SCK2, port RC8); slave core alternates are S1RP56/S1ASDA1/S1SCK1/S1RC8."
},
{
"number": "47",
"name": "RP57/ASCL1/SDI2/RC9",
"type": "bidirectional",
"description": "Master core function is RP57/ASCL1/SDI2/RC9 (remappable RP57, alternate serial clock ASCL1, SPI2 data input SDI2, port RC9); slave core alternates are S1RP57/S1ASCL1/S1SDI1/S1RC9."
},
{
"number": "48",
"name": "PCI20/RD9",
"type": "bidirectional",
"description": "Master core function is PCI20/RD9 (peripheral change input PCI20, port RD9); slave core alternates are S1PCI20/S1RD9."
},
{
"number": "49",
"name": "SDO2/PCI19/RD8",
"type": "bidirectional",
"description": "Master core function is SDO2/PCI19/RD8 (SPI2 data output SDO2, peripheral change input PCI19, port RD8); slave core alternates are S1SDO1/S1PCI19/S1RD8."
},
{
"number": "50",
"name": "VSS",
"type": "power_in",
"description": "Digital ground pin."
},
{
"number": "51",
"name": "VDD",
"type": "power_in",
"description": "Digital supply pin; the datasheet headline operating range is 3V to 3.6V."
},
{
"number": "52",
"name": "RP71/RD7",
"type": "bidirectional",
"description": "Master core function is RP71/RD7 (remappable I/O RP71, port RD7); slave core alternates are S1RP71/S1PWM8H/S1RD7."
},
{
"number": "53",
"name": "RP70/RD6",
"type": "bidirectional",
"description": "Master core function is RP70/RD6 (remappable I/O RP70, port RD6); slave core alternates are S1RP70/S1PWM6H/S1RD6."
},
{
"number": "54",
"name": "RP69/RD5",
"type": "bidirectional",
"description": "Master core function is RP69/RD5 (remappable I/O RP69, port RD5); slave core alternates are S1RP69/S1PWM6L/S1RD5."
},
{
"number": "55",
"name": "PGD3/RP37/SDA2/RB5",
"type": "bidirectional",
"description": "Master core function is PGD3/RP37/SDA2/RB5 (programming/debug data PGD3, remappable RP37, I2C2 data SDA2, port RB5); slave core alternates are S1PGD3/S1RP37/S1RB5."
},
{
"number": "56",
"name": "PGC3/RP38/SCL2/RB6",
"type": "input",
"description": "Master core function is PGC3/RP38/SCL2/RB6 (programming/debug clock PGC3, remappable RP38, I2C2 clock SCL2, port RB6); slave core alternates are S1PGC3/S1RP38/S1RB6."
},
{
"number": "57",
"name": "RE10",
"type": "bidirectional",
"description": "Master core function is port pin RE10; slave core alternate is S1RE10."
},
{
"number": "58",
"name": "TDO/AN9/RP39/RB7",
"type": "bidirectional",
"description": "Master core function is TDO/AN9/RP39/RB7 (JTAG data output TDO, ADC channel AN9, remappable RP39, port RB7); slave core alternates are S1MCLR1/S1AN6/S1RP39/S1PWM5H/S1RB7."
},
{
"number": "59",
"name": "RE11",
"type": "bidirectional",
"description": "Master core function is port pin RE11; slave core alternate is S1RE11."
},
{
"number": "60",
"name": "PGD1/AN10/RP40/SCL1/RB8",
"type": "bidirectional",
"description": "Master core function is PGD1/AN10/RP40/SCL1/RB8 (programming/debug data PGD1, ADC channel AN10, remappable RP40, I2C1 clock SCL1, port RB8); slave core alternates are S1PGD1/S1AN7/S1RP40/S1SCL1/S1RB8."
},
{
"number": "61",
"name": "PGC1/AN11/RP41/SDA1/RB9",
"type": "input",
"description": "Master core function is PGC1/AN11/RP41/SDA1/RB9 (programming/debug clock PGC1, ADC channel AN11, remappable RP41, I2C1 data SDA1, port RB9); slave core alternates are S1PGC1/S1RP41/S1SDA1/S1RB9."
},
{
"number": "62",
"name": "ASCL2/RE12",
"type": "bidirectional",
"description": "Master core function is alternate serial clock ASCL2 on port RE12; slave core alternate is S1RE12."
},
{
"number": "63",
"name": "RP52/RC4",
"type": "bidirectional",
"description": "Master core function is RP52/RC4 (remappable I/O RP52, port RC4); slave core alternates are S1RP52/S1PWM2H/S1RC4."
},
{
"number": "64",
"name": "ASDA2/RE13",
"type": "bidirectional",
"description": "Master core function is alternate serial data ASDA2 on port RE13; slave core alternate is S1RE13."
},
{
"number": "65",
"name": "RP53/RC5",
"type": "bidirectional",
"description": "Master core function is RP53/RC5 (remappable I/O RP53, port RC5); slave core alternates are S1RP53/S1PWM2L/S1RC5."
},
{
"number": "66",
"name": "RP58/RC10",
"type": "bidirectional",
"description": "Master core function is RP58/RC10 (remappable I/O RP58, port RC10); slave core alternates are S1RP58/S1PWM1H/S1RC10."
},
{
"number": "67",
"name": "RP59/RC11",
"type": "bidirectional",
"description": "Master core function is RP59/RC11 (remappable I/O RP59, port RC11); slave core alternates are S1RP59/S1PWM1L/S1RC11."
},
{
"number": "68",
"name": "RP68/RD4",
"type": "bidirectional",
"description": "Master core function is RP68/RD4 (remappable I/O RP68, port RD4); slave core alternates are S1RP68/S1PWM3H/S1RD4."
},
{
"number": "69",
"name": "RP67/RD3",
"type": "bidirectional",
"description": "Master core function is RP67/RD3 (remappable I/O RP67, port RD3); slave core alternates are S1RP67/S1PWM3L/S1RD3."
},
{
"number": "70",
"name": "VSS",
"type": "power_in",
"description": "Digital ground pin."
},
{
"number": "71",
"name": "VDD",
"type": "power_in",
"description": "Digital supply pin; the datasheet headline operating range is 3V to 3.6V."
},
{
"number": "72",
"name": "RP66/RD2",
"type": "bidirectional",
"description": "Master core function is RP66/RD2 (remappable I/O RP66, port RD2); slave core alternates are S1RP66/S1PWM8L/S1RD2."
},
{
"number": "73",
"name": "RP65/RD1",
"type": "bidirectional",
"description": "Master core function is RP65/RD1 (remappable I/O RP65, port RD1); slave core alternates are S1RP65/S1PWM4H/S1RD1."
},
{
"number": "74",
"name": "RP64/RD0",
"type": "bidirectional",
"description": "Master core function is RP64/RD0 (remappable I/O RP64, port RD0); slave core alternates are S1RP64/S1PWM4L/S1RD0."
},
{
"number": "75",
"name": "TMS/RP42/PWM3H/RB10",
"type": "bidirectional",
"description": "Master core function is TMS/RP42/PWM3H/RB10 (JTAG mode select TMS, remappable RP42, PWM3H output, port RB10); slave core alternates are S1RP42/S1RB10."
},
{
"number": "76",
"name": "TCK/RP43/PWM3L/RB11",
"type": "bidirectional",
"description": "Master core function is TCK/RP43/PWM3L/RB11 (JTAG clock TCK, remappable RP43, PWM3L output, port RB11); slave core alternates are S1RP43/S1RB11."
},
{
"number": "77",
"name": "RE14",
"type": "bidirectional",
"description": "Master core function is port pin RE14; slave core alternate is S1RE14."
},
{
"number": "78",
"name": "TDI/RP44/PWM2H/RB12",
"type": "bidirectional",
"description": "Master core function is TDI/RP44/PWM2H/RB12 (JTAG data input TDI, remappable RP44, PWM2H output, port RB12); slave core alternates are S1RP44/S1RB12."
},
{
"number": "79",
"name": "RE15",
"type": "bidirectional",
"description": "Master core function is port pin RE15; slave core alternate is S1RE15."
},
{
"number": "80",
"name": "RP45/PWM2L/RB13",
"type": "bidirectional",
"description": "Master core function is RP45/PWM2L/RB13 (remappable I/O RP45, PWM2L output, port RB13); slave core alternates are S1RP45/S1RB13."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pinout source: the 80-pin TQFP 12x12 mm package is shown on page 11 for dsPIC33CH512MP208 (listed al; The datasheet gives only the pin-name multiplexing (Table 6) for this package. It does not state per; Pin types are inferred from the function names (GPIO and multiplexed pins as bidirectional, MCLR and"
],
"pages_sent": 16,
"cost_usd": 0.1542,
"at": "2026-10-31T04:26:27"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/306f517690fa9a597626de096bcf5da8.pdf",
"pages": 16,
"sha256": "856e174c082eba86",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 80,
"described": 80,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "dspic33ch512mp208-i.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
14,
14,
1.1
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "77f4de0ca0c787b8b4416c735fddfcecf5cf4cea0ca3550f96f5c47c8664594c",
"checked": "2026-10-31",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "dspic33ch512mp208-i-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
14,
14,
1.1
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "00937c964e38a7031006ad65ae3f45c08362a89ab8e110bd97ca0f2c04c35f39",
"checked": "2026-10-31",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Microchip Tech",
"Package": "TQFP-80(12x12)",
"Category": "Embedded Processors & Controllers",
"Pins": "80"
},
"characteristics": {
"version": 1,
"source": "datasheet",
"datasheet_sha256": "856e174c082eba861db89d0dae743602774b2c4eecce76b97b842f1866fcca31",
"rows": [
{
"name": "Operating voltage (family headline, Operating Conditions bullet)",
"symbol": "",
"kind": "recommended_operating",
"unit": "V",
"min": 3,
"typ": null,
"max": 3.6,
"conditions": "",
"source_page": 1,
"source": "datasheet"
}
]
}
},
"variants": [],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"dspic33ch512mp208-i"
],
"discovery_pitch": "DSPIC33CH512MP208-I (Microchip Tech) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"dspic33ch512mp208-i.kicad_sym",
"dspic33ch512mp208-i.kicad_mod",
"dspic33ch512mp208-i.glb",
"dspic33ch512mp208-i.step",
"dspic33ch512mp208-i.lbr",
"docs/hero.png",
"docs/dspic33ch512mp208-i-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"dspic33ch512mp208-i-hero.glb",
"dspic33ch512mp208-i-hero.overlay.json",
"dspic33ch512mp208-i-etched.glb"
],
"visibility": {
"public": true
}
}