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Ray Initial commit: component/dslvds1048pwr 3b2c869 3d ago

DSLVDS1048PWR

Texas Instruments · LVDS ICs · TSSOP-16

DSLVDS1048PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RIN1- input Inverting receiver input pin (RIN− pins are 1, 4, 5, 8); input voltage range −0.3 V to 3.6 V absolute max.
2 RIN1+ input Noninverting receiver input pin (RIN+ pins are 2, 3, 6, 7); input voltage range −0.3 V to 3.6 V absolute max.
3 RIN2+ input Noninverting receiver input pin (RIN+ pins are 2, 3, 6, 7); input voltage range −0.3 V to 3.6 V absolute max.
4 RIN2- input Inverting receiver input pin (RIN− pins are 1, 4, 5, 8); input voltage range −0.3 V to 3.6 V absolute max.
5 RIN3- input Inverting receiver input pin (RIN− pins are 1, 4, 5, 8); input voltage range −0.3 V to 3.6 V absolute max.
6 RIN3+ input Noninverting receiver input pin (RIN+ pins are 2, 3, 6, 7); input voltage range −0.3 V to 3.6 V absolute max.
7 RIN4+ input Noninverting receiver input pin (RIN+ pins are 2, 3, 6, 7); input voltage range −0.3 V to 3.6 V absolute max.
8 RIN4- input Inverting receiver input pin (RIN− pins are 1, 4, 5, 8); input voltage range −0.3 V to 3.6 V absolute max.
9 EN* input Receiver enable pin: when EN* is high the receiver is disabled; when low or open and EN is high the receiver is enabled; if both EN and EN* are open the receiver is disabled.
10 ROUT4 output Receiver output pin (ROUT pins are 10, 11, 14, 15), TRI-STATE capable, with output voltage range −0.3 V to VCC + 0.3 V.
11 ROUT3 output Receiver output pin (ROUT pins are 10, 11, 14, 15), TRI-STATE capable, with output voltage range −0.3 V to VCC + 0.3 V.
12 GND power_in Ground pin.
13 VCC power_in Power supply pin, +3.3 V ± 0.3 V.
14 ROUT2 output Receiver output pin (ROUT pins are 10, 11, 14, 15), TRI-STATE capable, with output voltage range −0.3 V to VCC + 0.3 V.
15 ROUT1 output Receiver output pin (ROUT pins are 10, 11, 14, 15), TRI-STATE capable, with output voltage range −0.3 V to VCC + 0.3 V.
16 EN input Receiver enable pin: when EN is low the receiver is disabled; when EN is high and EN* is low or open the receiver is enabled; if both EN and EN* are open the receiver is disabled.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Interface
Pins 16

CAD (KiCad official)

  • Symbol: DSLVDS1048PWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: dslvds1048pwr-etched.step / dslvds1048pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dslvds1048pwr.step / dslvds1048pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 69efb504acf80373, retrieved 2026-10-03, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF