# DSLVDS1001DBVR

**Texas Instruments** · Pre-ordered Chips · SOT-23-5

DSLVDS1001DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Power supply pin, +3.3 V ± 0.3 V (3 V to 3.6 V recommended range, absolute maximum 4 V). |
| 2 | GND | power_in | Ground pin. |
| 3 | OUT- | output | Inverting LVDS driver output pin (±350 mV typical differential swing). |
| 4 | OUT+ | output | Noninverting LVDS driver output pin (±350 mV typical differential swing). |
| 5 | LVCMOS/LVTTL IN | input | LVCMOS/LVTTL driver input pin, absolute maximum input voltage 3.6 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Interface ICs |
| Pins | 5 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VDD | -0.3 |  | 4 | V | over operating free-air temperature range | 4 |
| LVCMOS input voltage (TTL IN) |  | -0.3 |  | 3.6 | V | over operating free-air temperature range | 4 |
| LVDS output voltage (OUT±) |  | -0.3 |  | 3.9 | V | over operating free-air temperature range | 4 |
| LVDS output short circuit current |  |  |  | 24 | mA | over operating free-air temperature range | 4 |
| Lead Temperature - Soldering |  |  |  | 260 | °C |  | 4 |
| Maximum Junction Temperature |  |  |  | 150 | °C |  | 4 |
| Storage temperature | Tstg | -65 |  | 150 | °C |  | 4 |
| ESD HBM | V(ESD) | -9000 |  | 9000 | V | Human-body model, ANSI/ESDA/JEDEC JS-001 | 4 |
| ESD CDM | V(ESD) | -2000 |  | 2000 | V | Charged-device model, JESD22-C101 | 4 |
| Supply Voltage (VDD) | VDD | 3 | 3.3 | 3.6 | V |  | 4 |
| Temperature (TA) | TA | -40 | 25 | 85 | °C |  | 4 |
| Junction-to-ambient thermal resistance | RθJA |  | 179.4 |  | °C/W | DBV (SOT-23), 5 pins | 4 |
| Junction-to-case (top) thermal resistance | RθJC(top) |  | 88.7 |  | °C/W |  | 4 |
| Junction-to-board thermal resistance | RθJB |  | 36.2 |  | °C/W |  | 4 |
| Output Differential Voltage | /VOD/ | 250 | 350 | 450 | mV | RL = 100 Ω (Figure 7), OUT+, OUT- pins | 5 |
| VOD Magnitude Change | ΔVOD |  | 3 | 35 | mV | RL = 100 Ω (Figure 8), OUT+, OUT- pins | 5 |
| Offset Voltage | VOS | 1.125 | 1.25 | 1.375 | V | RL = 100 Ω (Figure 7), OUT+, OUT- pins | 5 |
| Offset Magnitude Change | ΔVOS |  |  | 25 | mV | RL = 100 Ω (Figure 7), OUT+, OUT- pins | 5 |
| Power-off Leakage | IOFF |  | 2 | 15 | μA | VOUT = 3.6 V or GND, VDD = 0 V, OUT+, OUT- pins | 5 |
| Output Short Circuit Current | IOS |  | -5 | -20 | mA | VOUT+ and VOUT− = 0 V, OUT+, OUT- pins | 5 |
| Differential Output Short Circuit Current | IOSD |  | -5 | -12 | mA | VOD = 0 V, OUT+, OUT- pins | 5 |
| Input High Voltage | VIH | 2 |  |  | V | TTL IN pin; max printed as VDD | 5 |
| Input Low Voltage | VIL |  |  | 0.8 | V | TTL IN pin; min printed as GND | 5 |
| Input High Current | IIH |  | 2 | 15 | μA | VIN = 3.3 V or 2.4 V, TTL IN pin | 5 |
| Input Low Current | IIL |  | 2 | 15 | μA | VIN = GND or 0.5 V, TTL IN pin | 5 |
| Input Capacitance | CIN |  | 3 |  | pF | TTL IN pin | 5 |
| Power Supply Current, No Load | IDD |  | 5 | 8 | mA | No Load, VIN = VDD or GND | 5 |
| Power Supply Current, Loaded | IDD |  | 7 | 10 | mA | RL = 100 Ω, VIN = VDD or GND | 5 |
| Differential Propagation Delay High to Low | tPHLD | 0.5 | 1 | 1.5 | ns | RL = 100Ω, CL = 15 pF | 5 |
| Differential Propagation Delay Low to High | tPLHD | 0.5 | 1.1 | 1.5 | ns | RL = 100Ω, CL = 15 pF (Figure 9 and Figure 10) | 5 |
| Differential Pulse Skew /tPHLD − tPLHD/ | tSKD1 | 0 | 0.1 | 0.7 | ns |  | 5 |
| Differential Part to Part Skew | tSKD4 | 0 | 0.4 | 1.2 | ns |  | 5 |
| Rise Time | tr | 0.2 | 0.5 | 1 | ns |  | 5 |
| Fall Time | tf | 0.2 | 0.5 | 1 | ns |  | 5 |
| Maximum Operating Frequency | fMAX | 200 | 250 |  | MHz |  | 5 |

## CAD (KiCad official)

- Symbol: `DSLVDS1001DBVR`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `dslvds1001dbvr-etched.step` / `dslvds1001dbvr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dslvds1001dbvr.step` / `dslvds1001dbvr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/dslvds1001.pdf) (24 pp, sha256 `1682499747e59da8`, retrieved 2026-10-26, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/dslvds1001dbvr-datasheet.pdf)