component
DS91M040TSQX
Public Made by Adomby adom
Texas Instruments LVDS ICs, WQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
Ray
ds91m040tsqx: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
da01544
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{
"slug": "ds91m040tsqx",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments LVDS ICs, WQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"interface",
"ds91m040tsqx",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"ds91m040tsqx.kicad_sym",
"ds91m040tsqx.kicad_mod",
"ds91m040tsqx.glb",
"ds91m040tsqx.step",
"ds91m040tsqx.lbr",
"docs/hero.png",
"docs/ds91m040tsqx-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"component": {
"mpn": "DS91M040TSQX",
"manufacturer": "Texas Instruments",
"package": "WQFN-32-EP(5x5)",
"pin_count": 33,
"category": "Interface",
"subcategory": "LVDS ICs",
"datasheet": "https://www.ti.com/cn/lit/gpn/ds91m040",
"parts": {
"symbol": "ds91m040tsqx.kicad_sym",
"footprint": "ds91m040tsqx.kicad_mod",
"model_3d": "ds91m040tsqx-etched.glb",
"model_3d_plain": "ds91m040tsqx.glb",
"model_3d_step": "ds91m040tsqx-etched.step",
"model_3d_step_plain": "ds91m040tsqx.step",
"lbr": "ds91m040tsqx.lbr"
},
"distributor_links": {
"lcsc": "C2672371"
},
"distributor_check": {
"checked_at": "2026-09-27T07:05:09Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": null,
"status": "no match"
}
},
"pins": [
{
"number": "1",
"name": "RO0",
"type": "tri_state",
"description": "Channel 0 LVCMOS receiver output; VOH ≥ 2.4 V at IOH = −8 mA, VOL ≤ 0.4 V at IOL = 8 mA; tri-stated (IOZ ≤ ±10 µA) when RE0 = H."
},
{
"number": "2",
"name": "DI0",
"type": "input",
"description": "Channel 0 LVCMOS driver input; VIH = 2.0 V min, VIL = 0.8 V max; converts LVTTL/LVCMOS logic to M-LVDS on A0/B0 when DE0 = H."
},
{
"number": "3",
"name": "RO1",
"type": "tri_state",
"description": "Channel 1 LVCMOS receiver output; VOH ≥ 2.4 V at IOH = −8 mA, VOL ≤ 0.4 V at IOL = 8 mA; tri-stated (IOZ ≤ ±10 µA) when RE1 = H."
},
{
"number": "4",
"name": "DI1",
"type": "input",
"description": "Channel 1 LVCMOS driver input; VIH = 2.0 V min, VIL = 0.8 V max; converts LVTTL/LVCMOS logic to M-LVDS on A1/B1 when DE1 = H."
},
{
"number": "5",
"name": "RO2",
"type": "tri_state",
"description": "Channel 2 LVCMOS receiver output; VOH ≥ 2.4 V at IOH = −8 mA, VOL ≤ 0.4 V at IOL = 8 mA; tri-stated (IOZ ≤ ±10 µA) when RE2 = H."
},
{
"number": "6",
"name": "DI2",
"type": "input",
"description": "Channel 2 LVCMOS driver input; VIH = 2.0 V min, VIL = 0.8 V max; converts LVTTL/LVCMOS logic to M-LVDS on A2/B2 when DE2 = H."
},
{
"number": "7",
"name": "RO3",
"type": "tri_state",
"description": "Channel 3 LVCMOS receiver output; VOH ≥ 2.4 V at IOH = −8 mA, VOL ≤ 0.4 V at IOL = 8 mA; tri-stated (IOZ ≤ ±10 µA) when RE3 = H."
},
{
"number": "8",
"name": "DI3",
"type": "input",
"description": "Channel 3 LVCMOS driver input; VIH = 2.0 V min, VIL = 0.8 V max; converts LVTTL/LVCMOS logic to M-LVDS on A3/B3 when DE3 = H."
},
{
"number": "9",
"name": "FSEN2",
"type": "input",
"description": "Failsafe receiver-type select for channels 1 and 3 with 300 kΩ internal pullup; FSEN2 = L → Type 1 thresholds (VIT± = ±50 mV), FSEN2 = H → Type 2 thresholds (VIT+ = 100-150 mV)."
},
{
"number": "10",
"name": "MDE",
"type": "input",
"description": "Master device enable; MDE = H powers up device, MDE = L overrides all other controls and powers down device (ICCPD = 3-5 mA); wake-up time 500 ms."
},
{
"number": "11",
"name": "VDD",
"type": "power_in",
"description": "+3.3 V ± 0.3 V power supply pin; recommended operating range VDD = 3.0-3.6 V."
},
{
"number": "12",
"name": "VDD",
"type": "power_in",
"description": "+3.3 V ± 0.3 V power supply pin; recommended operating range VDD = 3.0-3.6 V."
},
{
"number": "13",
"name": "RE2",
"type": "input",
"description": "Channel 2 LVCMOS receiver enable with 300 kΩ internal pullup; RE2 = L enables receiver, RE2 = H tri-states RO2 output."
},
{
"number": "14",
"name": "DE2",
"type": "input",
"description": "Channel 2 LVCMOS driver enable with 300 kΩ internal pulldown; DE2 = H enables driver, DE2 = L tri-states A2/B2 outputs."
},
{
"number": "15",
"name": "RE3",
"type": "input",
"description": "Channel 3 LVCMOS receiver enable with 300 kΩ internal pullup; RE3 = L enables receiver, RE3 = H tri-states RO3 output."
},
{
"number": "16",
"name": "DE3",
"type": "input",
"description": "Channel 3 LVCMOS driver enable with 300 kΩ internal pulldown; DE3 = H enables driver, DE3 = L tri-states A3/B3 outputs."
},
{
"number": "17",
"name": "A3",
"type": "bidirectional",
"description": "Channel 3 non-inverting M-LVDS driver output / receiver input; |VAB| = 480-650 mV into 50 Ω, VOS = 0.3-2.1 V; input CM range −1.4 V to +3.8 V; 8 kV HBM ESD."
},
{
"number": "18",
"name": "B3",
"type": "bidirectional",
"description": "Channel 3 inverting M-LVDS driver output / receiver input; |VAB| = 480-650 mV into 50 Ω, VOS = 0.3-2.1 V; input CM range −1.4 V to +3.8 V; 8 kV HBM ESD."
},
{
"number": "19",
"name": "A2",
"type": "bidirectional",
"description": "Channel 2 non-inverting M-LVDS driver output / receiver input; |VAB| = 480-650 mV into 50 Ω, VOS = 0.3-2.1 V; input CM range −1.4 V to +3.8 V; 8 kV HBM ESD."
},
{
"number": "20",
"name": "B2",
"type": "bidirectional",
"description": "Channel 2 inverting M-LVDS driver output / receiver input; |VAB| = 480-650 mV into 50 Ω, VOS = 0.3-2.1 V; input CM range −1.4 V to +3.8 V; 8 kV HBM ESD."
},
{
"number": "21",
"name": "A1",
"type": "bidirectional",
"description": "Channel 1 non-inverting M-LVDS driver output / receiver input; |VAB| = 480-650 mV into 50 Ω, VOS = 0.3-2.1 V; input CM range −1.4 V to +3.8 V; 8 kV HBM ESD."
},
{
"number": "22",
"name": "B1",
"type": "bidirectional",
"description": "Channel 1 inverting M-LVDS driver output / receiver input; |VAB| = 480-650 mV into 50 Ω, VOS = 0.3-2.1 V; input CM range −1.4 V to +3.8 V; 8 kV HBM ESD."
},
{
"number": "23",
"name": "A0",
"type": "bidirectional",
"description": "Channel 0 non-inverting M-LVDS driver output / receiver input; |VAB| = 480-650 mV into 50 Ω, VOS = 0.3-2.1 V; input CM range −1.4 V to +3.8 V; 8 kV HBM ESD."
},
{
"number": "24",
"name": "B0",
"type": "bidirectional",
"description": "Channel 0 inverting M-LVDS driver output / receiver input; |VAB| = 480-650 mV into 50 Ω, VOS = 0.3-2.1 V; input CM range −1.4 V to +3.8 V; 8 kV HBM ESD."
},
{
"number": "25",
"name": "DE0",
"type": "input",
"description": "Channel 0 LVCMOS driver enable with 300 kΩ internal pulldown; DE0 = H enables driver, DE0 = L tri-states A0/B0 outputs."
},
{
"number": "26",
"name": "RE0",
"type": "input",
"description": "Channel 0 LVCMOS receiver enable with 300 kΩ internal pullup; RE0 = L enables receiver, RE0 = H tri-states RO0 output."
},
{
"number": "27",
"name": "DE1",
"type": "input",
"description": "Channel 1 LVCMOS driver enable with 300 kΩ internal pulldown; DE1 = H enables driver, DE1 = L tri-states A1/B1 outputs."
},
{
"number": "28",
"name": "RE1",
"type": "input",
"description": "Channel 1 LVCMOS receiver enable with 300 kΩ internal pullup; RE1 = L enables receiver, RE1 = H tri-states RO1 output."
},
{
"number": "29",
"name": "VDD",
"type": "power_in",
"description": "+3.3 V ± 0.3 V power supply pin; recommended operating range VDD = 3.0-3.6 V."
},
{
"number": "30",
"name": "VDD",
"type": "power_in",
"description": "+3.3 V ± 0.3 V power supply pin; recommended operating range VDD = 3.0-3.6 V."
},
{
"number": "31",
"name": "GND",
"type": "power_in",
"description": "Power ground pin; 0 V reference for all supply voltages."
},
{
"number": "32",
"name": "FSEN1",
"type": "input",
"description": "Failsafe receiver-type select for channels 0 and 2 with 300 kΩ internal pullup; FSEN1 = L → Type 1 thresholds (VIT± = ±50 mV), FSEN1 = H → Type 2 thresholds (VIT+ = 100-150 mV)."
},
{
"number": "33",
"name": "DAP",
"type": "power_in",
"description": "Exposed thermal pad, electrically GND; must be soldered to PCB ground plane for thermal and mechanical performance (θJC = 2.8 °C/W, θJA = 29.4 °C/W on 4-layer 2 oz Cu board)."
}
],
"provenance": {
"extractor": "extract_pins 0.2",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.2",
"primary_model": "claude-haiku-4-5-20251001",
"primary_mode": "text",
"consensus_model": "claude-sonnet-4-6",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"exposed pad 33 added from the footprint",
"dropped thermal pad ['EP'] absent from footprint"
],
"pages_sent": 23,
"cost_usd": 0.6979,
"at": "2026-09-27T07:04:51"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/ds91m040",
"pages": 23,
"sha256": "9be2a4c2c06208b6",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 33,
"described": 33,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "ds91m040tsqx.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
5.0,
5.0,
0.875
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ds91m040tsqx-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
5.0,
5.0,
0.875
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "d4f845c2a339ab52e84f066e148086b694ee698db20a4b40c92e4c6a630cd2be",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}