DS90UR908QSQE

{
  "schema_version": 1,
  "type": "component",
  "slug": "ds90ur908qsqe",
  "title": "DS90UR908QSQE",
  "brief": "Texas Instruments Serializers, Deserializers, WQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "interface",
    "ds90ur908qsqe",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "DS90UR908QSQE",
    "manufacturer": "Texas Instruments",
    "package": "WQFN-48-EP(7x7)",
    "pin_count": 49,
    "category": "Interface",
    "subcategory": "Serializers, Deserializers",
    "datasheet": "https://www.ti.com/cn/lit/gpn/ds90ur908q-q1",
    "parts": {
      "symbol": "ds90ur908qsqe.kicad_sym",
      "footprint": "ds90ur908qsqe.kicad_mod",
      "model_3d": "ds90ur908qsqe-hero.glb",
      "model_3d_plain": "ds90ur908qsqe.glb",
      "model_3d_step": "ds90ur908qsqe-etched.step",
      "model_3d_step_plain": "ds90ur908qsqe.step",
      "lbr": "ds90ur908qsqe.lbr"
    },
    "distributor_links": {
      "lcsc": "C2652218"
    },
    "distributor_check": {
      "checked_at": "2026-10-10T21:55:03Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "PDB",
        "type": "input",
        "description": "Power-down input with internal pull-down: PDB = 1 enables the device, and PDB = 0 powers it down with outputs TRI-STATE and control registers reset."
      },
      {
        "number": "2",
        "name": "SSC[0]",
        "type": "input",
        "description": "Spread-spectrum clock (SSCG) range select bit 0 with internal pull-down, with the modulation settings given in Tables 5 and 6."
      },
      {
        "number": "3",
        "name": "SSC[1]",
        "type": "input",
        "description": "Spread-spectrum clock (SSCG) range select bit 1 with internal pull-down, with the modulation settings given in Tables 5 and 6."
      },
      {
        "number": "4",
        "name": "SDA",
        "type": "bidirectional",
        "description": "Optional serial control bus data, open drain, which requires an external pull-up resistor to VDDIO."
      },
      {
        "number": "5",
        "name": "SCL",
        "type": "input",
        "description": "Optional serial control bus clock input, which requires an external pull-up resistor to VDDIO."
      },
      {
        "number": "6",
        "name": "VDDL",
        "type": "power_in",
        "description": "Logic power supply, 1.8 V ±5%."
      },
      {
        "number": "7",
        "name": "SSC[2]",
        "type": "input",
        "description": "Spread-spectrum clock (SSCG) range select bit 2 with internal pull-down, with the modulation settings given in Tables 5 and 6."
      },
      {
        "number": "8",
        "name": "VDDP",
        "type": "power_in",
        "description": "PLL power supply, 1.8 V ±5%."
      },
      {
        "number": "9",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "10",
        "name": "CONFIG[0]",
        "type": "input",
        "description": "Operating mode and interfacing-device select (pin or register) with internal pull-down, per Table 1."
      },
      {
        "number": "11",
        "name": "CONFIG[1]",
        "type": "input",
        "description": "Operating mode and interfacing-device select (pin or register) with internal pull-down, per Table 1."
      },
      {
        "number": "12",
        "name": "ID[x]",
        "type": "passive",
        "description": "Optional serial control bus device ID address select, using a resistor to ground and a 10 kΩ pull-up to the 1.8 V rail per Table 7."
      },
      {
        "number": "13",
        "name": "VDDTX",
        "type": "power_in",
        "description": "FPD-Link output power supply, 3.3 V ±10%."
      },
      {
        "number": "14",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "15",
        "name": "TxOUT3+",
        "type": "output",
        "description": "True LVDS data output, bit 3 of the FPD-Link output (mapping inferred from the pin-table grouping)."
      },
      {
        "number": "16",
        "name": "TxOUT3-",
        "type": "output",
        "description": "Inverting LVDS data output, bit 3 of the FPD-Link output (mapping inferred from the pin-table grouping)."
      },
      {
        "number": "17",
        "name": "TxCLKOUT+",
        "type": "output",
        "description": "True LVDS clock output."
      },
      {
        "number": "18",
        "name": "TxCLKOUT-",
        "type": "output",
        "description": "Inverting LVDS clock output."
      },
      {
        "number": "19",
        "name": "TxOUT2+",
        "type": "output",
        "description": "True LVDS data output, bit 2 of the FPD-Link output (mapping inferred from the pin-table grouping)."
      },
      {
        "number": "20",
        "name": "TxOUT2-",
        "type": "output",
        "description": "Inverting LVDS data output, bit 2 of the FPD-Link output (mapping inferred from the pin-table grouping)."
      },
      {
        "number": "21",
        "name": "TxOUT1+",
        "type": "output",
        "description": "True LVDS data output, bit 1 of the FPD-Link output (mapping inferred from the pin-table grouping)."
      },
      {
        "number": "22",
        "name": "TxOUT1-",
        "type": "output",
        "description": "Inverting LVDS data output, bit 1 of the FPD-Link output (mapping inferred from the pin-table grouping)."
      },
      {
        "number": "23",
        "name": "TxOUT0+",
        "type": "output",
        "description": "True LVDS data output, bit 0 of the FPD-Link output (mapping inferred from the pin-table grouping)."
      },
      {
        "number": "24",
        "name": "TxOUT0-",
        "type": "output",
        "description": "Inverting LVDS data output, bit 0 of the FPD-Link output (mapping inferred from the pin-table grouping)."
      },
      {
        "number": "25",
        "name": "VDDIO",
        "type": "power_in",
        "description": "LVCMOS I/O power supply, either 1.8 V ±5% or 3.3 V ±10%."
      },
      {
        "number": "26",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "27",
        "name": "LOCK",
        "type": "output",
        "description": "LVCMOS CDR lock status output: LOCK = 1 when the PLL is locked, and LOCK = 0 when unlocked, with outputs then set by OSS_SEL and OEN."
      },
      {
        "number": "28",
        "name": "PASS/EQ",
        "type": "bidirectional",
        "description": "Shared pin: as PASS (BIST) output it is high when no errors are detected and low when errors are detected, and as the EQ strap input (read at power-up) EQ = 1 enables input equalization (~13 dB) and EQ = 0 disables it (~1.625 dB)."
      },
      {
        "number": "29",
        "name": "BISTEN",
        "type": "input",
        "description": "BIST mode enable input with internal pull-down: BISTEN = 1 enables BIST mode and BISTEN = 0 selects normal mode."
      },
      {
        "number": "30",
        "name": "OEN",
        "type": "input",
        "description": "Output enable input with internal pull-down that controls the output states per Table 3."
      },
      {
        "number": "31",
        "name": "VDDL",
        "type": "power_in",
        "description": "Logic power supply, 1.8 V ±5%."
      },
      {
        "number": "32",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "33",
        "name": "VODSEL",
        "type": "input",
        "description": "FPD-Link output voltage select with internal pull-down: VODSEL = 1 gives ±400 mV (800 mVp-p typ) and VODSEL = 0 gives ±250 mV (500 mVp-p typ)."
      },
      {
        "number": "34",
        "name": "MAPSEL",
        "type": "input",
        "description": "FPD-Link map select (pin or register) with internal pull-down: MAPSEL = 1 puts the MSB on TxOUT3+/- and MAPSEL = 0 puts the LSB on TxOUT3+/-."
      },
      {
        "number": "35",
        "name": "OSS_SEL",
        "type": "input",
        "description": "Output sleep state select input with internal pull-down that sets the output state when LOCK is low, per Table 3."
      },
      {
        "number": "36",
        "name": "LFMODE",
        "type": "input",
        "description": "Low-frequency mode select (pin or register) with internal pull-down: LF_MODE = 1 for TxCLKOUT 5-20 MHz and LF_MODE = 0 for TxCLKOUT 20-65 MHz."
      },
      {
        "number": "37",
        "name": "RES",
        "type": "input",
        "description": "Reserved pin with internal pull-down that must be tied low."
      },
      {
        "number": "38",
        "name": "VDDA",
        "type": "power_in",
        "description": "Analog power supply, 1.8 V ±5%."
      },
      {
        "number": "39",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "40",
        "name": "RIN+",
        "type": "input",
        "description": "True FPD-Link II LVDS input, which must be AC coupled with a 100 nF capacitor and has internal termination."
      },
      {
        "number": "41",
        "name": "RIN-",
        "type": "input",
        "description": "Inverting FPD-Link II LVDS input, which must be AC coupled with a 100 nF capacitor and has internal termination."
      },
      {
        "number": "42",
        "name": "CMF",
        "type": "passive",
        "description": "Common-mode filter pin giving access to the internal termination center tap, where a recommended 4.7 µF or higher capacitor may be added."
      },
      {
        "number": "43",
        "name": "VDDA",
        "type": "power_in",
        "description": "Analog power supply, 1.8 V ±5%."
      },
      {
        "number": "44",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "45",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "46",
        "name": "VDDSC",
        "type": "power_in",
        "description": "SSC generator power supply, 1.8 V ±5%."
      },
      {
        "number": "47",
        "name": "VDDSC",
        "type": "power_in",
        "description": "SSC generator power supply, 1.8 V ±5%."
      },
      {
        "number": "48",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "49",
        "name": "DAP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The TxOUT pin-to-bit mapping (15/16 = TxOUT3, 19/20 = TxOUT2, 21/22 = TxOUT1, 23/24 = TxOUT0) is inf; Pin 28 is shared between PASS (BIST output) and the EQ strap input. The type is set to bidirectional; The exposed DAP pad is not assigned a numbered pin in the datasheet text. It is listed as 'DAP' here",
          "exposed pad 49 added from the footprint",
          "dropped thermal pad ['EP'] absent from footprint"
        ],
        "pages_sent": 15,
        "cost_usd": 0.1189,
        "at": "2026-10-10T21:54:44"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/ds90ur908q-q1",
        "pages": 37,
        "sha256": "5d306979dcf7176a",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 49,
        "described": 49,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
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      "footprint": "viewers/footprint.html"
    },
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        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
        "checked": "2026-10-10",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ds90ur908qsqe-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "0f4681adc42e6c3769ae0a0ad26a076a7b4b385326225f8c4139122f138c4d88",
        "checked": "2026-10-10",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "WQFN-48-EP(7x7)",
      "Category": "Interface",
      "Pins": "49"
    }
  },
  "variants": [],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
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  "discovery_triggers": [
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  "discovery_pitch": "DS90UR908QSQE (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
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    "path": "docs/hero.png"
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}