DS90UB960WRTDTQ1

{
  "slug": "ds90ub960wrtdtq1",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments LVDS ICs, VQFN-64(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "communication interface chip",
    "ds90ub960wrtdtq1",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ds90ub960wrtdtq1.kicad_sym",
    "ds90ub960wrtdtq1.kicad_mod",
    "ds90ub960wrtdtq1.glb",
    "ds90ub960wrtdtq1.step",
    "ds90ub960wrtdtq1.lbr",
    "docs/hero.png",
    "docs/ds90ub960wrtdtq1-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ds90ub960wrtdtq1-hero.glb",
    "ds90ub960wrtdtq1-hero.overlay.json",
    "ds90ub960wrtdtq1-etched.glb"
  ],
  "component": {
    "mpn": "DS90UB960WRTDTQ1",
    "manufacturer": "Texas Instruments",
    "package": "VQFN-64(9x9)",
    "pin_count": 65,
    "category": "Communication Interface Chip",
    "subcategory": "LVDS ICs",
    "datasheet": "https://www.ti.com/cn/lit/gpn/ds90ub960-q1",
    "parts": {
      "symbol": "ds90ub960wrtdtq1.kicad_sym",
      "footprint": "ds90ub960wrtdtq1.kicad_mod",
      "model_3d": "ds90ub960wrtdtq1-hero.glb",
      "model_3d_plain": "ds90ub960wrtdtq1-etched.glb",
      "model_3d_step": "ds90ub960wrtdtq1-etched.step",
      "model_3d_step_plain": "ds90ub960wrtdtq1.step",
      "lbr": "ds90ub960wrtdtq1.lbr"
    },
    "distributor_links": {
      "lcsc": "C3198381",
      "digikey": "296-DS90UB960WRTDTQ1TR-ND",
      "mouser": "595-DS90UB960WRTDTQ1"
    },
    "distributor_check": {
      "checked_at": "2026-10-28T22:06:13Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-DS90UB960WRTDTQ1TR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-DS90UB960WRTDTQ1",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDD18_P3",
        "type": "power_in",
        "description": "1.8-V (±5%) power supply pin; requires 0.1-μF or 0.01-μF capacitor to GND at each VDD pin, with additional 1-μF and 10-μF decoupling recommended for the pin group."
      },
      {
        "number": "2",
        "name": "VDD18_P2",
        "type": "power_in",
        "description": "1.8-V (±5%) power supply pin; requires 0.1-μF or 0.01-μF capacitor to GND at each VDD pin, with additional 1-μF and 10-μF decoupling recommended for the pin group."
      },
      {
        "number": "3",
        "name": "PDB",
        "type": "input",
        "description": "Inverted power-down input with internal 50-kΩ pulldown; PDB must be held low until supplies reach minimum levels, is 3.3-V tolerant, and high (1.8 V) enables the device."
      },
      {
        "number": "4",
        "name": "RES",
        "type": "passive",
        "description": "This pin must be tied to GND for normal operation."
      },
      {
        "number": "5",
        "name": "REFCLK",
        "type": "input",
        "description": "Reference clock oscillator input, typically 23-MHz to 26-MHz LVCMOS (100 ppm); 25 MHz is required for 400 Mbps, 800 Mbps, 1.2 Gbps or 1.6 Gbps CSI-2 data rates."
      },
      {
        "number": "6",
        "name": "INTB",
        "type": "output",
        "description": "Active-low open-drain interrupt output controlled by status registers; recommend 4.7-kΩ pullup to 1.8 V or 3.3 V, or leave as No Connect if unused."
      },
      {
        "number": "7",
        "name": "I2C_SDA2",
        "type": "bidirectional",
        "description": "Secondary I2C data open-drain input/output; pull up to VDDIO per SLVA689, or leave unconnected if unused."
      },
      {
        "number": "8",
        "name": "I2C_SCL2",
        "type": "bidirectional",
        "description": "Secondary I2C clock open-drain input/output; pull up to VDDIO per SLVA689, or leave unconnected if unused."
      },
      {
        "number": "9",
        "name": "GPIO0",
        "type": "bidirectional",
        "description": "General-purpose I/O with 25-kΩ typical internal pulldown, disabled at power-up; leave as No Connect if unused."
      },
      {
        "number": "10",
        "name": "GPIO1",
        "type": "bidirectional",
        "description": "General-purpose I/O with 25-kΩ typical internal pulldown, disabled at power-up; leave as No Connect if unused."
      },
      {
        "number": "11",
        "name": "I2C_SDA",
        "type": "bidirectional",
        "description": "Primary I2C data open-drain input/output; pull up to VDDIO per SLVA689, or leave unconnected if unused."
      },
      {
        "number": "12",
        "name": "I2C_SCL",
        "type": "bidirectional",
        "description": "Primary I2C clock open-drain input/output; pull up to VDDIO per SLVA689, or leave unconnected if unused."
      },
      {
        "number": "13",
        "name": "VDDL1",
        "type": "power_in",
        "description": "1.1-V (±5%) power supply pin; requires 0.1-μF or 0.01-μF capacitor to GND at each VDD pin, with additional 1-μF and 10-μF decoupling recommended."
      },
      {
        "number": "14",
        "name": "GPIO2",
        "type": "bidirectional",
        "description": "General-purpose I/O with 25-kΩ typical internal pulldown, disabled at power-up; leave as No Connect if unused."
      },
      {
        "number": "15",
        "name": "GPIO3",
        "type": "bidirectional",
        "description": "General-purpose I/O with 25-kΩ typical internal pulldown, disabled at power-up; leave as No Connect if unused."
      },
      {
        "number": "16",
        "name": "VDDIO",
        "type": "power_in",
        "description": "1.8-V (±5%) or 3.3-V (±10%) LVCMOS I/O power; requires 1-μF and 0.1-μF or 0.01-μF capacitors to GND."
      },
      {
        "number": "17",
        "name": "GPIO4",
        "type": "bidirectional",
        "description": "General-purpose I/O with 25-kΩ typical internal pulldown, disabled at power-up; leave as No Connect if unused."
      },
      {
        "number": "18",
        "name": "GPIO5",
        "type": "bidirectional",
        "description": "General-purpose I/O with 25-kΩ typical internal pulldown, disabled at power-up; leave as No Connect if unused."
      },
      {
        "number": "19",
        "name": "GPIO6",
        "type": "bidirectional",
        "description": "General-purpose I/O with 25-kΩ typical internal pulldown, disabled at power-up; leave as No Connect if unused."
      },
      {
        "number": "20",
        "name": "GPIO7",
        "type": "bidirectional",
        "description": "General-purpose I/O with 25-kΩ typical internal pulldown, disabled at power-up; leave as No Connect if unused."
      },
      {
        "number": "21",
        "name": "VDD_CSI0",
        "type": "power_in",
        "description": "1.1-V (±5%) power supply for CSI-2 Port 0; requires 0.1-μF or 0.01-μF capacitor to GND at each VDD pin, with additional 1-μF and 10-μF decoupling recommended."
      },
      {
        "number": "22",
        "name": "CSI0_CLKN",
        "type": "output",
        "description": "CSI-2 TX Port 0 differential clock output (negative); leave as No Connect if unused."
      },
      {
        "number": "23",
        "name": "CSI0_CLKP",
        "type": "output",
        "description": "CSI-2 TX Port 0 differential clock output (positive); leave as No Connect if unused."
      },
      {
        "number": "24",
        "name": "CSI0_D0N",
        "type": "output",
        "description": "CSI-2 TX Port 0 differential data lane 0 output (negative), configured via CSI_PORT_SEL, CSI_CTL and CSI_CTL2; leave as No Connect if unused."
      },
      {
        "number": "25",
        "name": "CSI0_D0P",
        "type": "output",
        "description": "CSI-2 TX Port 0 differential data lane 0 output (positive), configured via CSI_PORT_SEL, CSI_CTL and CSI_CTL2; leave as No Connect if unused."
      },
      {
        "number": "26",
        "name": "CSI0_D1N",
        "type": "output",
        "description": "CSI-2 TX Port 0 differential data lane 1 output (negative), configured via CSI_PORT_SEL, CSI_CTL and CSI_CTL2; leave as No Connect if unused."
      },
      {
        "number": "27",
        "name": "CSI0_D1P",
        "type": "output",
        "description": "CSI-2 TX Port 0 differential data lane 1 output (positive), configured via CSI_PORT_SEL, CSI_CTL and CSI_CTL2; leave as No Connect if unused."
      },
      {
        "number": "28",
        "name": "CSI0_D2N",
        "type": "output",
        "description": "CSI-2 TX Port 0 differential data lane 2 output (negative), configured via CSI_PORT_SEL, CSI_CTL and CSI_CTL2; leave as No Connect if unused."
      },
      {
        "number": "29",
        "name": "CSI0_D2P",
        "type": "output",
        "description": "CSI-2 TX Port 0 differential data lane 2 output (positive), configured via CSI_PORT_SEL, CSI_CTL and CSI_CTL2; leave as No Connect if unused."
      },
      {
        "number": "30",
        "name": "CSI0_D3N",
        "type": "output",
        "description": "CSI-2 TX Port 0 differential data lane 3 output (negative), configured via CSI_PORT_SEL, CSI_CTL and CSI_CTL2; leave as No Connect if unused."
      },
      {
        "number": "31",
        "name": "CSI0_D3P",
        "type": "output",
        "description": "CSI-2 TX Port 0 differential data lane 3 output (positive), configured via CSI_PORT_SEL, CSI_CTL and CSI_CTL2; leave as No Connect if unused."
      },
      {
        "number": "32",
        "name": "VDD18A",
        "type": "power_in",
        "description": "1.8-V (±5%) power supply pin; requires 0.1-μF or 0.01-μF capacitor to GND at each VDD pin, with additional 1-μF and 10-μF decoupling recommended."
      },
      {
        "number": "33",
        "name": "VDD_CSI1",
        "type": "power_in",
        "description": "1.1-V (±5%) power supply for CSI-2 Port 1; requires 0.1-μF or 0.01-μF capacitor to GND at each VDD pin, with additional 1-μF and 10-μF decoupling recommended."
      },
      {
        "number": "34",
        "name": "CSI1_CLKN",
        "type": "output",
        "description": "CSI-2 TX Port 1 differential clock output (negative); leave as No Connect if unused."
      },
      {
        "number": "35",
        "name": "CSI1_CLKP",
        "type": "output",
        "description": "CSI-2 TX Port 1 differential clock output (positive); leave as No Connect if unused."
      },
      {
        "number": "36",
        "name": "CSI1_D0N",
        "type": "output",
        "description": "CSI-2 TX Port 1 differential data lane 0 output (negative), configured via CSI_PORT_SEL, CSI_CTL and CSI_CTL2; leave as No Connect if unused."
      },
      {
        "number": "37",
        "name": "CSI1_D0P",
        "type": "output",
        "description": "CSI-2 TX Port 1 differential data lane 0 output (positive), configured via CSI_PORT_SEL, CSI_CTL and CSI_CTL2; leave as No Connect if unused."
      },
      {
        "number": "38",
        "name": "CSI1_D1N",
        "type": "output",
        "description": "CSI-2 TX Port 1 differential data lane 1 output (negative), configured via CSI_PORT_SEL, CSI_CTL and CSI_CTL2; leave as No Connect if unused."
      },
      {
        "number": "39",
        "name": "CSI1_D1P",
        "type": "output",
        "description": "CSI-2 TX Port 1 differential data lane 1 output (positive), configured via CSI_PORT_SEL, CSI_CTL and CSI_CTL2; leave as No Connect if unused."
      },
      {
        "number": "40",
        "name": "CSI1_D2N",
        "type": "output",
        "description": "CSI-2 TX Port 1 differential data lane 2 output (negative), configured via CSI_PORT_SEL, CSI_CTL and CSI_CTL2; leave as No Connect if unused."
      },
      {
        "number": "41",
        "name": "CSI1_D2P",
        "type": "output",
        "description": "CSI-2 TX Port 1 differential data lane 2 output (positive), configured via CSI_PORT_SEL, CSI_CTL and CSI_CTL2; leave as No Connect if unused."
      },
      {
        "number": "42",
        "name": "CSI1_D3N",
        "type": "output",
        "description": "CSI-2 TX Port 1 differential data lane 3 output (negative), configured via CSI_PORT_SEL, CSI_CTL and CSI_CTL2; leave as No Connect if unused."
      },
      {
        "number": "43",
        "name": "CSI1_D3P",
        "type": "output",
        "description": "CSI-2 TX Port 1 differential data lane 3 output (positive), configured via CSI_PORT_SEL, CSI_CTL and CSI_CTL2; leave as No Connect if unused."
      },
      {
        "number": "44",
        "name": "VDDL2",
        "type": "power_in",
        "description": "1.1-V (±5%) power supply pin; requires 0.1-μF or 0.01-μF capacitor to GND at each VDD pin, with additional 1-μF and 10-μF decoupling recommended."
      },
      {
        "number": "45",
        "name": "MODE",
        "type": "input",
        "description": "Mode select strap input; connect a pullup to VDD18 and a pulldown to GND as a voltage divider per Table 7-2."
      },
      {
        "number": "46",
        "name": "IDX",
        "type": "input",
        "description": "I2C serial control bus device ID address strap input; connect a pullup to VDD18 and a pulldown to GND as a voltage divider per Table 7-18."
      },
      {
        "number": "47",
        "name": "VDD18_P1",
        "type": "power_in",
        "description": "1.8-V (±5%) power supply pin; requires 0.1-μF or 0.01-μF capacitor to GND at each VDD pin, with additional 1-μF and 10-μF decoupling recommended."
      },
      {
        "number": "48",
        "name": "VDD18_P0",
        "type": "power_in",
        "description": "1.8-V (±5%) power supply pin; requires 0.1-μF or 0.01-μF capacitor to GND at each VDD pin, with additional 1-μF and 10-μF decoupling recommended."
      },
      {
        "number": "49",
        "name": "VDD18_FPD0",
        "type": "power_in",
        "description": "1.8-V (±5%) power supply for FPD-Link III RX Port 0; requires 0.1-μF or 0.01-μF capacitor to GND at each VDD pin, with additional 1-μF and 10-μF decoupling recommended."
      },
      {
        "number": "50",
        "name": "RIN0+",
        "type": "bidirectional",
        "description": "FPD-Link III RX Port 0 positive input; must be AC-coupled per Table 8-4, and RX_PORT_CTL bit 0 set to 0 disables the port if unused."
      },
      {
        "number": "51",
        "name": "RIN0-",
        "type": "bidirectional",
        "description": "FPD-Link III RX Port 0 negative input; must be AC-coupled per Table 8-4, and RX_PORT_CTL bit 0 set to 0 disables the port if unused."
      },
      {
        "number": "52",
        "name": "VDD_FPD1",
        "type": "power_in",
        "description": "1.1-V (±5%) power supply pin; requires 0.1-μF or 0.01-μF capacitor to GND at each VDD pin, with additional 1-μF and 10-μF decoupling recommended."
      },
      {
        "number": "53",
        "name": "RIN1+",
        "type": "bidirectional",
        "description": "FPD-Link III RX Port 1 positive input; must be AC-coupled per Table 8-4, and RX_PORT_CTL bit 1 set to 0 disables the port if unused."
      },
      {
        "number": "54",
        "name": "RIN1-",
        "type": "bidirectional",
        "description": "FPD-Link III RX Port 1 negative input; must be AC-coupled per Table 8-4, and RX_PORT_CTL bit 1 set to 0 disables the port if unused."
      },
      {
        "number": "55",
        "name": "VDD18_FPD1",
        "type": "power_in",
        "description": "1.8-V (±5%) power supply for FPD-Link III RX Port 1; requires 0.1-μF or 0.01-μF capacitor to GND at each VDD pin, with additional 1-μF and 10-μF decoupling recommended."
      },
      {
        "number": "56",
        "name": "CMLOUTP",
        "type": "output",
        "description": "Channel Monitor Loop-through driver positive differential output; route to a test point or pad with 100-Ω termination between CMLOUTP and CMLOUTN (recommended)."
      },
      {
        "number": "57",
        "name": "CMLOUTN",
        "type": "output",
        "description": "Channel Monitor Loop-through driver negative differential output; route to a test point or pad with 100-Ω termination between CMLOUTP and CMLOUTN (recommended)."
      },
      {
        "number": "58",
        "name": "VDD18_FPD2",
        "type": "power_in",
        "description": "1.8-V (±5%) power supply for FPD-Link III RX Port 2; requires 0.1-μF or 0.01-μF capacitor to GND at each VDD pin, with additional 1-μF and 10-μF decoupling recommended."
      },
      {
        "number": "59",
        "name": "RIN2+",
        "type": "bidirectional",
        "description": "FPD-Link III RX Port 2 positive input; must be AC-coupled per Table 8-4, and RX_PORT_CTL bit 2 set to 0 disables the port if unused."
      },
      {
        "number": "60",
        "name": "RIN2-",
        "type": "bidirectional",
        "description": "FPD-Link III RX Port 2 negative input; must be AC-coupled per Table 8-4, and RX_PORT_CTL bit 2 set to 0 disables the port if unused."
      },
      {
        "number": "61",
        "name": "VDD_FPD2",
        "type": "power_in",
        "description": "1.1-V (±5%) power supply pin; requires 0.1-μF or 0.01-μF capacitor to GND at each VDD pin, with additional 1-μF and 10-μF decoupling recommended."
      },
      {
        "number": "62",
        "name": "RIN3+",
        "type": "bidirectional",
        "description": "FPD-Link III RX Port 3 positive input; must be AC-coupled per Table 8-4, and RX_PORT_CTL bit 3 set to 0 disables the port if unused."
      },
      {
        "number": "63",
        "name": "RIN3-",
        "type": "bidirectional",
        "description": "FPD-Link III RX Port 3 negative input; must be AC-coupled per Table 8-4, and RX_PORT_CTL bit 3 set to 0 disables the port if unused."
      },
      {
        "number": "64",
        "name": "VDD18_FPD3",
        "type": "power_in",
        "description": "1.8-V (±5%) power supply for FPD-Link III RX Port 3; requires 0.1-μF or 0.01-μF capacitor to GND at each VDD pin, with additional 1-μF and 10-μF decoupling recommended."
      },
      {
        "number": "65",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The DAP (exposed thermal pad, GND) is not a numbered pin and is omitted from the pin list; the datas; Pin 4 (RES) has no electrical type in the table; it is typed passive because the datasheet only stat; INTB, I2C_SCL/SDA and I2C_SCL2/SDA2 are open-drain in the datasheet, but KiCad has no open-drain cla",
          "exposed pad 65 added from the footprint"
        ],
        "pages_sent": 18,
        "cost_usd": 0.177,
        "at": "2026-10-28T22:05:49"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/ds90ub960-q1",
        "pages": 191,
        "sha256": "60c8314e70121607",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 65,
        "described": 65,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ds90ub960wrtdtq1.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          0.75
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "dce07a86ec3fe3ca87eebdff13827f55e036ced5518fee01f85cec4a3f56366d",
        "checked": "2026-10-28",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ds90ub960wrtdtq1-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          0.75
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "ecaa0608141704124b949e88b8f923024b8aa461ecc0cbb87c8f0dd2a3d6013f",
        "checked": "2026-10-28",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "RTD0064F",
      "source_page": 188,
      "D": {
        "nom_mm": 9.0,
        "range_mm": [
          8.9,
          9.1
        ]
      },
      "E1": {
        "nom_mm": 9.0,
        "range_mm": [
          8.9,
          9.1
        ]
      },
      "e": {
        "nom_mm": 0.5,
        "range_mm": [
          null,
          null
        ]
      },
      "A": {
        "nom_mm": 0.9,
        "range_mm": [
          null,
          0.9
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "ds90ub960wrtdtq1.step",
        "verdict": "PASS",
        "reasons": [
          "height within the datasheet's package drawing"
        ],
        "by": "factory/package_fit.py"
      }
    }
  }
}