DS90UB953ATRHBTQ1

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  "type": "component",
  "slug": "ds90ub953atrhbtq1",
  "title": "DS90UB953ATRHBTQ1",
  "brief": "Texas Instruments Serializers, Deserializers, VQFN-32(5x5). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
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    "interface",
    "ds90ub953atrhbtq1"
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  "component": {
    "mpn": "DS90UB953ATRHBTQ1",
    "manufacturer": "Texas Instruments",
    "package": "VQFN-32(5x5)",
    "pin_count": 33,
    "category": "Interface",
    "subcategory": "Serializers, Deserializers",
    "datasheet": "https://www.ti.com/cn/lit/gpn/ds90ub953a-q1",
    "parts": {
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      "lbr": "ds90ub953atrhbtq1.lbr"
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    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "CSI_D1P",
        "type": "input",
        "description": "CSI-2 D-PHY data lane 1 positive input. Connect to a CSI-2 data source through a 100Ω (±5%) matched-impedance interconnect. May be left floating if unused."
      },
      {
        "number": "2",
        "name": "CSI_D1N",
        "type": "input",
        "description": "CSI-2 D-PHY data lane 1 negative input. Pair with CSI_D1P over 100Ω matched-impedance. May be left floating if unused."
      },
      {
        "number": "3",
        "name": "CSI_D0P",
        "type": "input",
        "description": "CSI-2 D-PHY data lane 0 positive input. Connect to a CSI-2 data source through a 100Ω (±5%) matched-impedance interconnect."
      },
      {
        "number": "4",
        "name": "CSI_D0N",
        "type": "input",
        "description": "CSI-2 D-PHY data lane 0 negative input. Pair with CSI_D0P."
      },
      {
        "number": "5",
        "name": "CSI_CLKP",
        "type": "input",
        "description": "CSI-2 D-PHY clock positive input. Connect to a CSI-2 clock source with 100Ω (±5%) matched-impedance interconnect."
      },
      {
        "number": "6",
        "name": "CSI_CLKN",
        "type": "input",
        "description": "CSI-2 D-PHY clock negative input. Pair with CSI_CLKP."
      },
      {
        "number": "7",
        "name": "RES0",
        "type": "input",
        "description": "Reserved pin - must be tied to GND."
      },
      {
        "number": "8",
        "name": "PDB",
        "type": "input",
        "description": "Active-low power-down / device enable input, internally pulled down (~1MΩ). Drive high to enable the device (typically tied to a processor GPIO). Do NOT drive above VDD (1.8V); PDB is NOT 3.3V tolerant. PDB=1.8V: device operating; PDB=0: device disabled."
      },
      {
        "number": "9",
        "name": "LPF1",
        "type": "passive",
        "description": "PLL loop filter 1 network connection. Populate per section 7.2.2.4."
      },
      {
        "number": "10",
        "name": "VDDPLL_CAP",
        "type": "passive",
        "description": "Internal analog LDO decoupling capacitor connection. Typically bypass with 10µF, 0.1µF and 0.01µF caps to GND. Do NOT connect to an external supply rail."
      },
      {
        "number": "11",
        "name": "VDDPLL",
        "type": "power_in",
        "description": "1.8V (±5%) analog PLL supply. Bypass with 1µF cap to GND."
      },
      {
        "number": "12",
        "name": "LPF2",
        "type": "passive",
        "description": "PLL loop filter 2 network connection. Populate per section 7.2.2.4."
      },
      {
        "number": "13",
        "name": "DOUT-",
        "type": "bidirectional",
        "description": "FPD-Link III serial link negative I/O. AC-couple this pin as shown in Figure 7-3/7-5/7-6."
      },
      {
        "number": "14",
        "name": "DOUT+",
        "type": "bidirectional",
        "description": "FPD-Link III serial link positive I/O. AC-couple this pin as shown in the reference circuits."
      },
      {
        "number": "15",
        "name": "VDDDRV_CAP",
        "type": "passive",
        "description": "Internal analog LDO decoupling capacitor connection for the driver rail. Typically bypass with 10µF, 0.1µF and 0.01µF caps to GND. Do NOT connect to an external supply."
      },
      {
        "number": "16",
        "name": "VDDDRV",
        "type": "power_in",
        "description": "1.8V (±5%) analog driver supply. Bypass with 1µF cap to GND."
      },
      {
        "number": "17",
        "name": "GPIO_0",
        "type": "bidirectional",
        "description": "General-purpose I/O; also usable as a voltage-sense input. Internal ~300kΩ pull-down default. If unused, may be left open, but TI recommends setting GPIOx_INPUT_EN=0."
      },
      {
        "number": "18",
        "name": "GPIO_1",
        "type": "bidirectional",
        "description": "General-purpose I/O; also usable as a voltage-sense input. Internal ~300kΩ pull-down default."
      },
      {
        "number": "19",
        "name": "CLK_OUT/IDX",
        "type": "bidirectional",
        "description": "Strap-configured I/O: at power-up an IDX voltage divider (external pull-up to VDD and pull-down to GND) sets the I2C address; after strap sampling the pin becomes CLK_OUT. Minimum external pull-up 35kΩ; tie to GND if unused."
      },
      {
        "number": "20",
        "name": "CLKIN",
        "type": "input",
        "description": "Reference clock input. In non-synchronous external clock mode connect this pin to a local clock source; otherwise (synchronous with FPD-Link clock) leave open. See section 6-8."
      },
      {
        "number": "21",
        "name": "MODE",
        "type": "input",
        "description": "Mode-select strap input sampled during PDB low-to-high transition to select operating configuration. Set via an external pull-up to VDD18 and pull-down to GND to create a voltage divider. See MODE section for details."
      },
      {
        "number": "22",
        "name": "RES1",
        "type": "input",
        "description": "Reserved pin - leave unconnected (open)."
      },
      {
        "number": "23",
        "name": "I2C_SDA",
        "type": "bidirectional",
        "description": "I2C data pin, open-drain. Pull up to a 1.8V or 3.3V supply per the IDX setting. See I2C interface configuration and SVLA689 for pull-up sizing."
      },
      {
        "number": "24",
        "name": "I2C_SCL",
        "type": "bidirectional",
        "description": "I2C clock pin, open-drain. Pull up per the IDX setting (1.8V or 3.3V)."
      },
      {
        "number": "25",
        "name": "VDDD",
        "type": "power_in",
        "description": "1.8V (±5%) digital supply. Bypass with 1µF cap to GND."
      },
      {
        "number": "26",
        "name": "VDDD_CAP",
        "type": "passive",
        "description": "Internal digital LDO decoupling capacitor pin. Typically bypass with 10µF, 0.1µF and 0.01µF caps to GND. Do NOT connect to an external supply."
      },
      {
        "number": "27",
        "name": "GPIO_2",
        "type": "bidirectional",
        "description": "General-purpose I/O with internal ~300kΩ pull-down at reset. May be left open if unused; TI recommends GPIOx_INPUT_EN=0 in that case."
      },
      {
        "number": "28",
        "name": "GPIO_3",
        "type": "bidirectional",
        "description": "General-purpose I/O with internal ~300kΩ pull-down at reset."
      },
      {
        "number": "29",
        "name": "CSI_D3P",
        "type": "input",
        "description": "CSI-2 D-PHY data lane 3 positive input. Connect to a CSI-2 data source through a 100Ω (±5%) matched-impedance interconnect. May be left floating if unused."
      },
      {
        "number": "30",
        "name": "CSI_D3N",
        "type": "input",
        "description": "CSI-2 D-PHY data lane 3 negative input."
      },
      {
        "number": "31",
        "name": "CSI_D2P",
        "type": "input",
        "description": "CSI-2 D-PHY data lane 2 positive input. Connect to a CSI-2 data source through a 100Ω (±5%) matched-impedance interconnect."
      },
      {
        "number": "32",
        "name": "CSI_D2N",
        "type": "input",
        "description": "CSI-2 D-PHY data lane 2 negative input."
      },
      {
        "number": "DAP",
        "name": "GND",
        "type": "power_in",
        "description": "Die attach pad - large metal contact on the bottom center of the VQFN. Must be connected to the ground plane (GND) for electrical return and thermal dissipation."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/ds90ub953a-q1",
        "pages": 94,
        "sha256": "370a551290974f6a",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 33,
        "described": 33,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
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        "zmin_mm": 0,
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        "checked": "2026-10-07",
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  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "VQFN-32(5x5)",
      "Category": "Interface",
      "Pins": "33"
    }
  },
  "variants": [
    {
      "mpn": "DS90UB953ATRHBTQ1",
      "kind": "packaging"
    },
    {
      "mpn": "DS90UB953ATRHBTQ1RHBRQ1",
      "kind": "packaging"
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  "discovery_pitch": "DS90UB953ATRHBTQ1 (Texas Instruments) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
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  "updated_at": "2026-09-24T20:09:46.639Z"
}