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@@ -0,0 +1,102 @@+# DS90UB949TRGCRQ1++**Texas Instruments** · Serializers / Deserializers · VQFN-64-EP(9x9)++DS90UB949TRGCRQ1 from Texas Instruments, in a VQFN-64-EP(9x9). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CEC | bidirectional | Open-drain Consumer Electronic Control channel I/O; pull up with a 27-kΩ resistor to 3.3 V. |+| 2 | RES0 | passive | Reserved; tie to GND. |+| 3 | VDDIO | power_in | 1.8-V (±5%) IO supply. |+| 4 | GPIO0/SDIN | bidirectional | LVCMOS BCC GPIO0, shared with master-mode auxiliary I2S data input SDIN. |+| 5 | GPIO1/SWC | bidirectional | LVCMOS BCC GPIO1, shared with master-mode I2S word clock output SWC. |+| 6 | I2CSEL/SCLK | bidirectional | I2C voltage strap read at power-up (10-kΩ to VDDIO for 1.8-V I2C, float for 3.3-V I2C), then switches to master-mode I2S clock output SCLK. |+| 7 | VDDL11 | power_in | 1.1-V (±5%) digital supply. |+| 8 | D_GPIO0/MOSI | bidirectional | LVCMOS high-speed GPIO0 shared with SPI MOSI (dual-link mode only). |+| 9 | VDDA11 | power_in | 1.1-V (±5%) analog supply. |+| 10 | D_GPIO1/MISO | bidirectional | LVCMOS high-speed GPIO1 shared with SPI MISO (dual-link mode only). |+| 11 | D_GPIO2/SPLK | bidirectional | LVCMOS high-speed GPIO2 shared with SPI clock (dual-link mode only). |+| 12 | D_GPIO3/SS | bidirectional | LVCMOS high-speed GPIO3 shared with SPI slave select (dual-link mode only). |+| 13 | INTB | output | Open-drain active-low remote interrupt output; pull up to VDDIO with 4.7 kΩ. |+| 14 | SDA | bidirectional | Open-drain I2C data I/O; requires external pullup to 1.8 V or 3.3 V (recommended 4.7 kΩ), do not float. |+| 15 | SCL | bidirectional | Open-drain I2C clock I/O; requires external pullup to 1.8 V or 3.3 V (recommended 4.7 kΩ), do not float. |+| 16 | MCLK | bidirectional | LVCMOS master-mode I2S system clock input/output. |+| 17 | VDDP11 | power_in | 1.1-V (±5%) PLL supply. |+| 18 | MODE_SEL0 | input | Analog mode select 0 input set by resistor divider (see Table 6). |+| 19 | IDx | input | Analog I2C serial control bus device ID address select. |+| 20 | LFT | passive | FPD-Link III loop filter; connect a 10-nF capacitor to GND. |+| 21 | VDDHS11 | power_in | 1.1-V (±5%) supply. |+| 22 | DOUT1- | output | FPD-Link III inverting output 1; AC-couple with 0.1 µF for 92x deserializers or 33 nF for 94x. |+| 23 | DOUT1+ | output | FPD-Link III true output 1; AC-couple with 0.1 µF for 92x deserializers or 33 nF for 94x. |+| 24 | VDD18 | power_in | 1.8-V (±5%) analog supply. |+| 25 | VDDS11 | power_in | 1.1-V (±5%) serializer supply. |+| 26 | DOUT0- | output | FPD-Link III inverting output 0; AC-couple with 0.1 µF for 92x deserializers or 33 nF for 94x. |+| 27 | DOUT0+ | output | FPD-Link III true output 0; AC-couple with 0.1 µF for 92x deserializers or 33 nF for 94x. |+| 28 | VDDHS11 | power_in | 1.1-V (±5%) supply. |+| 29 | RES1 | passive | Reserved; tie to GND. |+| 30 | RES2 | passive | Reserved; connect with 50 Ω to GND. |+| 31 | PDB | input | LVCMOS power-down mode input (active-high enable). |+| 32 | MODE_SEL1 | input | Analog mode select 1 input set by resistor divider (see Table 6). |+| 33 | I2S_WC/GPIO7_REG | bidirectional | Slave-mode I2S word clock input shared with register-only GPIO7. |+| 34 | I2S_CLK/GPIO8_REG | bidirectional | Slave-mode I2S clock input shared with register-only GPIO8. |+| 35 | I2S_DA/GPIO6_REG | bidirectional | Slave-mode I2S data input shared with register-only GPIO6. |+| 36 | I2S_DB/GPIO5_REG | bidirectional | Slave-mode I2S data input shared with register-only GPIO5. |+| 37 | I2S_DC/GPIO2 | bidirectional | Slave-mode I2S data input shared with BCC GPIO2. |+| 38 | I2S_DD/GPIO3 | bidirectional | Slave-mode I2S data input shared with BCC GPIO3. |+| 39 | X1 | input | Optional CEC reference clock input, 25 MHz 0.1% 45-55% duty cycle at 1.8-V CMOS level; leave open if unused. |+| 40 | REM_INTB | output | Open-drain remote interrupt mirroring INTB_IN from the deserializer; external 1.8-V pullup required (recommended 4.7 kΩ). |+| 41 | VDDL11 | power_in | 1.1-V (±5%) digital supply. |+| 42 | HPD | output | Open-drain Hot Plug Detect output; pull up to RX_5V with a 1-kΩ resistor. |+| 43 | RX_5V | input | HDMI 5-V detect input. |+| 44 | DDC_SDA | bidirectional | Open-drain DDC slave serial data; pull up to RX_5V with 47 kΩ. |+| 45 | DDC_SCL | input | Open-drain DDC slave serial clock; pull up to RX_5V with 47 kΩ. |+| 46 | VDDIO | power_in | 1.8-V (±5%) IO supply. |+| 47 | NC0 | unconnected | No connect; leave floating, do not connect to VDD or GND. |+| 48 | NC1 | unconnected | No connect; leave floating, do not connect to VDD or GND. |+| 49 | IN_CLK- | input | TMDS clock differential input (negative). |+| 50 | IN_CLK+ | input | TMDS clock differential input (positive). |+| 51 | VDD18 | power_in | 1.8-V (±5%) analog supply. |+| 52 | VDDHA11 | power_in | 1.1-V (±5%) TMDS supply. |+| 53 | NC2 | unconnected | No connect; leave floating, do not connect to VDD or GND. |+| 54 | VDDHA11 | power_in | 1.1-V (±5%) TMDS supply. |+| 55 | IN_D0- | input | TMDS data channel 0 differential input (negative). |+| 56 | IN_D0+ | input | TMDS data channel 0 differential input (positive). |+| 57 | VTERM | power_in | 3.3-V (±5%) supply for DC-coupled internal termination or 1.8-V (±5%) for AC-coupled termination. |+| 58 | VDDHA11 | power_in | 1.1-V (±5%) TMDS supply. |+| 59 | IN_D1- | input | TMDS data channel 1 differential input (negative). |+| 60 | IN_D1+ | input | TMDS data channel 1 differential input (positive). |+| 61 | VDDHA11 | power_in | 1.1-V (±5%) TMDS supply. |+| 62 | IN_D2- | input | TMDS data channel 2 differential input (negative). |+| 63 | IN_D2+ | input | TMDS data channel 2 differential input (positive). |+| 64 | VDD18 | power_in | 1.8-V (±5%) analog supply. |+| 65 | GND | power_in | Exposed thermal pad (DAP) ground; connect to ground plane with at least 9 vias. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-64-EP(9x9) |+| Category | Communication Interface Chip/UART/485/232 |+| Pins | 65 |++## CAD (KiCad official)++- Symbol: `DS90UB949TRGCRQ1`+- Footprint: `Package_DFN_QFN:QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm`+- 3D model: VQFN-64-EP(9x9) (KiCad packages3D, STEP)+- 3D model files: `ds90ub949trgcrq1-etched.step` / `ds90ub949trgcrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ds90ub949trgcrq1.step` / `ds90ub949trgcrq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ds90ub949-q1) (88 pp, sha256 `6c33021a3706f57f`, retrieved 2026-10-07, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ds90ub949trgcrq1-datasheet.pdf)
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@@ -0,0 +1,543 @@+{+  "slug": "ds90ub949trgcrq1",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Serializers / Deserializers, VQFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "communication interface chip-uart-485-232",+    "ds90ub949trgcrq1",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "ds90ub949trgcrq1.kicad_sym",+    "ds90ub949trgcrq1.kicad_mod",+    "ds90ub949trgcrq1.glb",+    "ds90ub949trgcrq1.step",+    "ds90ub949trgcrq1.lbr",+    "docs/hero.png",+    "docs/ds90ub949trgcrq1-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "ds90ub949trgcrq1-hero.glb",+    "ds90ub949trgcrq1-hero.overlay.json"+  ],+  "component": {+    "mpn": "DS90UB949TRGCRQ1",+    "manufacturer": "Texas Instruments",+    "package": "VQFN-64-EP(9x9)",+    "pin_count": 65,+    "category": "Communication Interface Chip/UART/485/232",+    "subcategory": "Serializers / Deserializers",+    "datasheet": "https://www.ti.com/cn/lit/gpn/ds90ub949-q1",+    "parts": {+      "symbol": "ds90ub949trgcrq1.kicad_sym",+      "footprint": "ds90ub949trgcrq1.kicad_mod",+      "model_3d": "ds90ub949trgcrq1-hero.glb",+      "model_3d_plain": "ds90ub949trgcrq1.glb",+      "model_3d_step": "ds90ub949trgcrq1-etched.step",+      "model_3d_step_plain": "ds90ub949trgcrq1.step",+      "lbr": "ds90ub949trgcrq1.lbr"+    },+    "distributor_links": {+      "lcsc": "C2652228",+      "digikey": "296-48910-2-ND",+      "mouser": "595-DS90UB949TRGCRQ1"+    },+    "distributor_check": {+      "checked_at": "2026-10-07T03:12:39Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-48910-2-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-DS90UB949TRGCRQ1",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "CEC",+        "type": "bidirectional",+        "description": "Open-drain Consumer Electronic Control channel I/O; pull up with a 27-kΩ resistor to 3.3 V."+      },+      {+        "number": "2",+        "name": "RES0",+        "type": "passive",+        "description": "Reserved; tie to GND."+      },+      {+        "number": "3",+        "name": "VDDIO",+        "type": "power_in",+        "description": "1.8-V (±5%) IO supply."+      },+      {+        "number": "4",+        "name": "GPIO0/SDIN",+        "type": "bidirectional",+        "description": "LVCMOS BCC GPIO0, shared with master-mode auxiliary I2S data input SDIN."+      },+      {+        "number": "5",+        "name": "GPIO1/SWC",+        "type": "bidirectional",+        "description": "LVCMOS BCC GPIO1, shared with master-mode I2S word clock output SWC."+      },+      {+        "number": "6",+        "name": "I2CSEL/SCLK",+        "type": "bidirectional",+        "description": "I2C voltage strap read at power-up (10-kΩ to VDDIO for 1.8-V I2C, float for 3.3-V I2C), then switches to master-mode I2S clock output SCLK."+      },+      {+        "number": "7",+        "name": "VDDL11",+        "type": "power_in",+        "description": "1.1-V (±5%) digital supply."+      },+      {+        "number": "8",+        "name": "D_GPIO0/MOSI",+        "type": "bidirectional",+        "description": "LVCMOS high-speed GPIO0 shared with SPI MOSI (dual-link mode only)."+      },+      {+        "number": "9",+        "name": "VDDA11",+        "type": "power_in",+        "description": "1.1-V (±5%) analog supply."+      },+      {+        "number": "10",+        "name": "D_GPIO1/MISO",+        "type": "bidirectional",+        "description": "LVCMOS high-speed GPIO1 shared with SPI MISO (dual-link mode only)."+      },+      {+        "number": "11",+        "name": "D_GPIO2/SPLK",+        "type": "bidirectional",+        "description": "LVCMOS high-speed GPIO2 shared with SPI clock (dual-link mode only)."+      },+      {+        "number": "12",+        "name": "D_GPIO3/SS",+        "type": "bidirectional",+        "description": "LVCMOS high-speed GPIO3 shared with SPI slave select (dual-link mode only)."+      },+      {+        "number": "13",+        "name": "INTB",+        "type": "output",+        "description": "Open-drain active-low remote interrupt output; pull up to VDDIO with 4.7 kΩ."+      },+      {+        "number": "14",+        "name": "SDA",+        "type": "bidirectional",+        "description": "Open-drain I2C data I/O; requires external pullup to 1.8 V or 3.3 V (recommended 4.7 kΩ), do not float."+      },+      {+        "number": "15",+        "name": "SCL",+        "type": "bidirectional",+        "description": "Open-drain I2C clock I/O; requires external pullup to 1.8 V or 3.3 V (recommended 4.7 kΩ), do not float."+      },+      {+        "number": "16",+        "name": "MCLK",+        "type": "bidirectional",+        "description": "LVCMOS master-mode I2S system clock input/output."+      },+      {+        "number": "17",+        "name": "VDDP11",+        "type": "power_in",+        "description": "1.1-V (±5%) PLL supply."+      },+      {+        "number": "18",+        "name": "MODE_SEL0",+        "type": "input",+        "description": "Analog mode select 0 input set by resistor divider (see Table 6)."+      },+      {+        "number": "19",+        "name": "IDx",+        "type": "input",+        "description": "Analog I2C serial control bus device ID address select."+      },+      {+        "number": "20",+        "name": "LFT",+        "type": "passive",+        "description": "FPD-Link III loop filter; connect a 10-nF capacitor to GND."+      },+      {+        "number": "21",+        "name": "VDDHS11",+        "type": "power_in",+        "description": "1.1-V (±5%) supply."+      },+      {+        "number": "22",+        "name": "DOUT1-",+        "type": "output",+        "description": "FPD-Link III inverting output 1; AC-couple with 0.1 µF for 92x deserializers or 33 nF for 94x."+      },+      {+        "number": "23",+        "name": "DOUT1+",+        "type": "output",+        "description": "FPD-Link III true output 1; AC-couple with 0.1 µF for 92x deserializers or 33 nF for 94x."+      },+      {+        "number": "24",+        "name": "VDD18",+        "type": "power_in",+        "description": "1.8-V (±5%) analog supply."+      },+      {+        "number": "25",+        "name": "VDDS11",+        "type": "power_in",+        "description": "1.1-V (±5%) serializer supply."+      },+      {+        "number": "26",+        "name": "DOUT0-",+        "type": "output",+        "description": "FPD-Link III inverting output 0; AC-couple with 0.1 µF for 92x deserializers or 33 nF for 94x."+      },+      {+        "number": "27",+        "name": "DOUT0+",+        "type": "output",+        "description": "FPD-Link III true output 0; AC-couple with 0.1 µF for 92x deserializers or 33 nF for 94x."+      },+      {+        "number": "28",+        "name": "VDDHS11",+        "type": "power_in",+        "description": "1.1-V (±5%) supply."+      },+      {+        "number": "29",+        "name": "RES1",+        "type": "passive",+        "description": "Reserved; tie to GND."+      },+      {+        "number": "30",+        "name": "RES2",+        "type": "passive",+        "description": "Reserved; connect with 50 Ω to GND."+      },+      {+        "number": "31",+        "name": "PDB",+        "type": "input",+        "description": "LVCMOS power-down mode input (active-high enable)."+      },+      {+        "number": "32",+        "name": "MODE_SEL1",+        "type": "input",+        "description": "Analog mode select 1 input set by resistor divider (see Table 6)."+      },+      {+        "number": "33",+        "name": "I2S_WC/GPIO7_REG",+        "type": "bidirectional",+        "description": "Slave-mode I2S word clock input shared with register-only GPIO7."+      },+      {+        "number": "34",+        "name": "I2S_CLK/GPIO8_REG",+        "type": "bidirectional",+        "description": "Slave-mode I2S clock input shared with register-only GPIO8."+      },+      {+        "number": "35",+        "name": "I2S_DA/GPIO6_REG",+        "type": "bidirectional",+        "description": "Slave-mode I2S data input shared with register-only GPIO6."+      },+      {+        "number": "36",+        "name": "I2S_DB/GPIO5_REG",+        "type": "bidirectional",+        "description": "Slave-mode I2S data input shared with register-only GPIO5."+      },+      {+        "number": "37",+        "name": "I2S_DC/GPIO2",+        "type": "bidirectional",+        "description": "Slave-mode I2S data input shared with BCC GPIO2."+      },+      {+        "number": "38",+        "name": "I2S_DD/GPIO3",+        "type": "bidirectional",+        "description": "Slave-mode I2S data input shared with BCC GPIO3."+      },+      {+        "number": "39",+        "name": "X1",+        "type": "input",+        "description": "Optional CEC reference clock input, 25 MHz 0.1% 45-55% duty cycle at 1.8-V CMOS level; leave open if unused."+      },+      {+        "number": "40",+        "name": "REM_INTB",+        "type": "output",+        "description": "Open-drain remote interrupt mirroring INTB_IN from the deserializer; external 1.8-V pullup required (recommended 4.7 kΩ)."+      },+      {+        "number": "41",+        "name": "VDDL11",+        "type": "power_in",+        "description": "1.1-V (±5%) digital supply."+      },+      {+        "number": "42",+        "name": "HPD",+        "type": "output",+        "description": "Open-drain Hot Plug Detect output; pull up to RX_5V with a 1-kΩ resistor."+      },+      {+        "number": "43",+        "name": "RX_5V",+        "type": "input",+        "description": "HDMI 5-V detect input."+      },+      {+        "number": "44",+        "name": "DDC_SDA",+        "type": "bidirectional",+        "description": "Open-drain DDC slave serial data; pull up to RX_5V with 47 kΩ."+      },+      {+        "number": "45",+        "name": "DDC_SCL",+        "type": "input",+        "description": "Open-drain DDC slave serial clock; pull up to RX_5V with 47 kΩ."+      },+      {+        "number": "46",+        "name": "VDDIO",+        "type": "power_in",+        "description": "1.8-V (±5%) IO supply."+      },+      {+        "number": "47",+        "name": "NC0",+        "type": "unconnected",+        "description": "No connect; leave floating, do not connect to VDD or GND."+      },+      {+        "number": "48",+        "name": "NC1",+        "type": "unconnected",+        "description": "No connect; leave floating, do not connect to VDD or GND."+      },+      {+        "number": "49",+        "name": "IN_CLK-",+        "type": "input",+        "description": "TMDS clock differential input (negative)."+      },+      {+        "number": "50",+        "name": "IN_CLK+",+        "type": "input",+        "description": "TMDS clock differential input (positive)."+      },+      {+        "number": "51",+        "name": "VDD18",+        "type": "power_in",+        "description": "1.8-V (±5%) analog supply."+      },+      {+        "number": "52",+        "name": "VDDHA11",+        "type": "power_in",+        "description": "1.1-V (±5%) TMDS supply."+      },+      {+        "number": "53",+        "name": "NC2",+        "type": "unconnected",+        "description": "No connect; leave floating, do not connect to VDD or GND."+      },+      {+        "number": "54",+        "name": "VDDHA11",+        "type": "power_in",+        "description": "1.1-V (±5%) TMDS supply."+      },+      {+        "number": "55",+        "name": "IN_D0-",+        "type": "input",+        "description": "TMDS data channel 0 differential input (negative)."+      },+      {+        "number": "56",+        "name": "IN_D0+",+        "type": "input",+        "description": "TMDS data channel 0 differential input (positive)."+      },+      {+        "number": "57",+        "name": "VTERM",+        "type": "power_in",+        "description": "3.3-V (±5%) supply for DC-coupled internal termination or 1.8-V (±5%) for AC-coupled termination."+      },+      {+        "number": "58",+        "name": "VDDHA11",+        "type": "power_in",+        "description": "1.1-V (±5%) TMDS supply."+      },+      {+        "number": "59",+        "name": "IN_D1-",+        "type": "input",+        "description": "TMDS data channel 1 differential input (negative)."+      },+      {+        "number": "60",+        "name": "IN_D1+",+        "type": "input",+        "description": "TMDS data channel 1 differential input (positive)."+      },+      {+        "number": "61",+        "name": "VDDHA11",+        "type": "power_in",+        "description": "1.1-V (±5%) TMDS supply."+      },+      {+        "number": "62",+        "name": "IN_D2-",+        "type": "input",+        "description": "TMDS data channel 2 differential input (negative)."+      },+      {+        "number": "63",+        "name": "IN_D2+",+        "type": "input",+        "description": "TMDS data channel 2 differential input (positive)."+      },+      {+        "number": "64",+        "name": "VDD18",+        "type": "power_in",+        "description": "1.8-V (±5%) analog supply."+      },+      {+        "number": "65",+        "name": "GND",+        "type": "power_in",+        "description": "Exposed thermal pad (DAP) ground; connect to ground plane with at least 9 vias."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "exposed pad 65 added from the footprint",+          "dropped thermal pad ['EP'] absent from footprint"+        ],+        "pages_sent": 23,+        "cost_usd": 0.4258,+        "at": "2026-10-07T03:12:16"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/ds90ub949-q1",+        "pages": 88,+        "sha256": "6c33021a3706f57f",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 65,+        "described": 65,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "ds90ub949trgcrq1.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          9,+          9,+          0.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "dce07a86ec3fe3ca87eebdff13827f55e036ced5518fee01f85cec4a3f56366d",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "ds90ub949trgcrq1-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          9,+          9,+          0.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "801194f950eaa7cc9feedd878449cfc6171accfdc6dea983cd1ac2cf5a6a4e6f",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file