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DS90UB949TRGCRQ1

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Texas Instruments Serializers / Deserializers, VQFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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DS90UB949TRGCRQ1

Texas Instruments · Serializers / Deserializers · VQFN-64-EP(9x9)

DS90UB949TRGCRQ1 from Texas Instruments, in a VQFN-64-EP(9x9). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CEC bidirectional Open-drain Consumer Electronic Control channel I/O; pull up with a 27-kΩ resistor to 3.3 V.
2 RES0 passive Reserved; tie to GND.
3 VDDIO power_in 1.8-V (±5%) IO supply.
4 GPIO0/SDIN bidirectional LVCMOS BCC GPIO0, shared with master-mode auxiliary I2S data input SDIN.
5 GPIO1/SWC bidirectional LVCMOS BCC GPIO1, shared with master-mode I2S word clock output SWC.
6 I2CSEL/SCLK bidirectional I2C voltage strap read at power-up (10-kΩ to VDDIO for 1.8-V I2C, float for 3.3-V I2C), then switches to master-mode I2S clock output SCLK.
7 VDDL11 power_in 1.1-V (±5%) digital supply.
8 D_GPIO0/MOSI bidirectional LVCMOS high-speed GPIO0 shared with SPI MOSI (dual-link mode only).
9 VDDA11 power_in 1.1-V (±5%) analog supply.
10 D_GPIO1/MISO bidirectional LVCMOS high-speed GPIO1 shared with SPI MISO (dual-link mode only).
11 D_GPIO2/SPLK bidirectional LVCMOS high-speed GPIO2 shared with SPI clock (dual-link mode only).
12 D_GPIO3/SS bidirectional LVCMOS high-speed GPIO3 shared with SPI slave select (dual-link mode only).
13 INTB output Open-drain active-low remote interrupt output; pull up to VDDIO with 4.7 kΩ.
14 SDA bidirectional Open-drain I2C data I/O; requires external pullup to 1.8 V or 3.3 V (recommended 4.7 kΩ), do not float.
15 SCL bidirectional Open-drain I2C clock I/O; requires external pullup to 1.8 V or 3.3 V (recommended 4.7 kΩ), do not float.
16 MCLK bidirectional LVCMOS master-mode I2S system clock input/output.
17 VDDP11 power_in 1.1-V (±5%) PLL supply.
18 MODE_SEL0 input Analog mode select 0 input set by resistor divider (see Table 6).
19 IDx input Analog I2C serial control bus device ID address select.
20 LFT passive FPD-Link III loop filter; connect a 10-nF capacitor to GND.
21 VDDHS11 power_in 1.1-V (±5%) supply.
22 DOUT1- output FPD-Link III inverting output 1; AC-couple with 0.1 µF for 92x deserializers or 33 nF for 94x.
23 DOUT1+ output FPD-Link III true output 1; AC-couple with 0.1 µF for 92x deserializers or 33 nF for 94x.
24 VDD18 power_in 1.8-V (±5%) analog supply.
25 VDDS11 power_in 1.1-V (±5%) serializer supply.
26 DOUT0- output FPD-Link III inverting output 0; AC-couple with 0.1 µF for 92x deserializers or 33 nF for 94x.
27 DOUT0+ output FPD-Link III true output 0; AC-couple with 0.1 µF for 92x deserializers or 33 nF for 94x.
28 VDDHS11 power_in 1.1-V (±5%) supply.
29 RES1 passive Reserved; tie to GND.
30 RES2 passive Reserved; connect with 50 Ω to GND.
31 PDB input LVCMOS power-down mode input (active-high enable).
32 MODE_SEL1 input Analog mode select 1 input set by resistor divider (see Table 6).
33 I2S_WC/GPIO7_REG bidirectional Slave-mode I2S word clock input shared with register-only GPIO7.
34 I2S_CLK/GPIO8_REG bidirectional Slave-mode I2S clock input shared with register-only GPIO8.
35 I2S_DA/GPIO6_REG bidirectional Slave-mode I2S data input shared with register-only GPIO6.
36 I2S_DB/GPIO5_REG bidirectional Slave-mode I2S data input shared with register-only GPIO5.
37 I2S_DC/GPIO2 bidirectional Slave-mode I2S data input shared with BCC GPIO2.
38 I2S_DD/GPIO3 bidirectional Slave-mode I2S data input shared with BCC GPIO3.
39 X1 input Optional CEC reference clock input, 25 MHz 0.1% 45-55% duty cycle at 1.8-V CMOS level; leave open if unused.
40 REM_INTB output Open-drain remote interrupt mirroring INTB_IN from the deserializer; external 1.8-V pullup required (recommended 4.7 kΩ).
41 VDDL11 power_in 1.1-V (±5%) digital supply.
42 HPD output Open-drain Hot Plug Detect output; pull up to RX_5V with a 1-kΩ resistor.
43 RX_5V input HDMI 5-V detect input.
44 DDC_SDA bidirectional Open-drain DDC slave serial data; pull up to RX_5V with 47 kΩ.
45 DDC_SCL input Open-drain DDC slave serial clock; pull up to RX_5V with 47 kΩ.
46 VDDIO power_in 1.8-V (±5%) IO supply.
47 NC0 unconnected No connect; leave floating, do not connect to VDD or GND.
48 NC1 unconnected No connect; leave floating, do not connect to VDD or GND.
49 IN_CLK- input TMDS clock differential input (negative).
50 IN_CLK+ input TMDS clock differential input (positive).
51 VDD18 power_in 1.8-V (±5%) analog supply.
52 VDDHA11 power_in 1.1-V (±5%) TMDS supply.
53 NC2 unconnected No connect; leave floating, do not connect to VDD or GND.
54 VDDHA11 power_in 1.1-V (±5%) TMDS supply.
55 IN_D0- input TMDS data channel 0 differential input (negative).
56 IN_D0+ input TMDS data channel 0 differential input (positive).
57 VTERM power_in 3.3-V (±5%) supply for DC-coupled internal termination or 1.8-V (±5%) for AC-coupled termination.
58 VDDHA11 power_in 1.1-V (±5%) TMDS supply.
59 IN_D1- input TMDS data channel 1 differential input (negative).
60 IN_D1+ input TMDS data channel 1 differential input (positive).
61 VDDHA11 power_in 1.1-V (±5%) TMDS supply.
62 IN_D2- input TMDS data channel 2 differential input (negative).
63 IN_D2+ input TMDS data channel 2 differential input (positive).
64 VDD18 power_in 1.8-V (±5%) analog supply.
65 GND power_in Exposed thermal pad (DAP) ground; connect to ground plane with at least 9 vias.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-64-EP(9x9)
Category Communication Interface Chip/UART/485/232
Pins 65

CAD (KiCad official)

  • Symbol: DS90UB949TRGCRQ1
  • Footprint: Package_DFN_QFN:QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm
  • 3D model: VQFN-64-EP(9x9) (KiCad packages3D, STEP)
  • 3D model files: ds90ub949trgcrq1-etched.step / ds90ub949trgcrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ds90ub949trgcrq1.step / ds90ub949trgcrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (88 pp, sha256 6c33021a3706f57f, retrieved 2026-10-07, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF