DS90UB934TRGZTQ1

{
  "slug": "ds90ub934trgztq1",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments LVDS ICs, VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
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    "interface",
    "ds90ub934trgztq1",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
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  "component": {
    "mpn": "DS90UB934TRGZTQ1",
    "manufacturer": "Texas Instruments",
    "package": "VQFN-48-EP(7x7)",
    "pin_count": 49,
    "category": "Interface",
    "subcategory": "LVDS ICs",
    "datasheet": "https://www.ti.com/lit/ds/symlink/ds90ub934-q1.pdf",
    "parts": {
      "symbol": "ds90ub934trgztq1.kicad_sym",
      "footprint": "ds90ub934trgztq1.kicad_mod",
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      "lbr": "ds90ub934trgztq1.lbr"
    },
    "distributor_links": {
      "lcsc": "C2652239",
      "digikey": "296-47771-2-ND",
      "mouser": "595-DS90UB934TRGZTQ1"
    },
    "distributor_check": {
      "checked_at": "2026-11-11T01:34:45Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-47771-2-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-DS90UB934TRGZTQ1",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "I2C_SDA",
        "type": "bidirectional",
        "description": "I2C serial data for the bidirectional control bus, open-drain, with an external 2 kΩ to 4.7 kΩ pullup to VI2C recommended."
      },
      {
        "number": "2",
        "name": "I2C_SCL",
        "type": "bidirectional",
        "description": "I2C serial clock for the bidirectional control bus, open-drain, with an external 2 kΩ to 4.7 kΩ pullup to VI2C recommended."
      },
      {
        "number": "3",
        "name": "VDD11_D",
        "type": "passive",
        "description": "Decoupling connection for the internal digital 1.1-V regulator; requires a minimum 4.7 µF capacitor to GND and must not be connected to other 1.1-V rails."
      },
      {
        "number": "4",
        "name": "OSS_SEL",
        "type": "input",
        "description": "Output sleep state select input with 25 kΩ internal pulldown; if unused connect to VDD, and any pullup to VDD must be ≤ 4.3 kΩ; VDDIO logic levels."
      },
      {
        "number": "5",
        "name": "OEN",
        "type": "input",
        "description": "Output enable input with 1 MΩ internal pulldown; if unused connect to VDD, and any pullup to VDD must be ≤ 4.3 kΩ; VDDIO logic levels."
      },
      {
        "number": "6",
        "name": "BISTEN",
        "type": "input",
        "description": "BIST enable input: high enables BIST mode, low disables it; 25 kΩ internal pulldown and VDDIO logic levels."
      },
      {
        "number": "7",
        "name": "VDDIO",
        "type": "power_in",
        "description": "Supply for the single-ended outputs and control inputs, connectable to 1.8 V ±5% or 3 V to 3.6 V; each pin requires a minimum 10 nF capacitor to GND."
      },
      {
        "number": "8",
        "name": "PCLK",
        "type": "output",
        "description": "Pixel clock output at VDDIO logic levels."
      },
      {
        "number": "9",
        "name": "VSYNC",
        "type": "output",
        "description": "Vertical sync output at VDDIO logic levels."
      },
      {
        "number": "10",
        "name": "HSYNC",
        "type": "output",
        "description": "Horizontal sync output at VDDIO logic levels."
      },
      {
        "number": "11",
        "name": "ROUT11",
        "type": "output",
        "description": "Parallel receive data output bit 11 at VDDIO logic levels; leave as No Connect if unused."
      },
      {
        "number": "12",
        "name": "ROUT10",
        "type": "output",
        "description": "Parallel receive data output bit 10 at VDDIO logic levels; leave as No Connect if unused."
      },
      {
        "number": "13",
        "name": "ROUT9",
        "type": "output",
        "description": "Parallel receive data output bit 9 at VDDIO logic levels; leave as No Connect if unused."
      },
      {
        "number": "14",
        "name": "ROUT8",
        "type": "output",
        "description": "Parallel receive data output bit 8 at VDDIO logic levels; leave as No Connect if unused."
      },
      {
        "number": "15",
        "name": "ROUT7",
        "type": "output",
        "description": "Parallel receive data output bit 7 at VDDIO logic levels; leave as No Connect if unused."
      },
      {
        "number": "16",
        "name": "ROUT6",
        "type": "output",
        "description": "Parallel receive data output bit 6 at VDDIO logic levels; leave as No Connect if unused."
      },
      {
        "number": "17",
        "name": "VDD18",
        "type": "power_in",
        "description": "1.8-V ±5% power supply; requires 1 µF, 0.1 µF, and 0.01 µF capacitors to GND at each VDD pin."
      },
      {
        "number": "18",
        "name": "ROUT5",
        "type": "output",
        "description": "Parallel receive data output bit 5 at VDDIO logic levels; leave as No Connect if unused."
      },
      {
        "number": "19",
        "name": "ROUT4",
        "type": "output",
        "description": "Parallel receive data output bit 4 at VDDIO logic levels; leave as No Connect if unused."
      },
      {
        "number": "20",
        "name": "VDD11_DVP",
        "type": "passive",
        "description": "Decoupling connection for the internal mixed-signal 1.1-V regulator; requires a minimum 4.7 µF capacitor to GND and must not be connected to other 1.1-V rails."
      },
      {
        "number": "21",
        "name": "ROUT3",
        "type": "output",
        "description": "Parallel receive data output bit 3 at VDDIO logic levels; leave as No Connect if unused."
      },
      {
        "number": "22",
        "name": "ROUT2",
        "type": "output",
        "description": "Parallel receive data output bit 2 at VDDIO logic levels; leave as No Connect if unused."
      },
      {
        "number": "23",
        "name": "ROUT1",
        "type": "output",
        "description": "Parallel receive data output bit 1 at VDDIO logic levels; leave as No Connect if unused."
      },
      {
        "number": "24",
        "name": "ROUT0",
        "type": "output",
        "description": "Parallel receive data output bit 0 at VDDIO logic levels; leave as No Connect if unused."
      },
      {
        "number": "25",
        "name": "GPIO3/INTB",
        "type": "bidirectional",
        "description": "GPIO3 input/output that can also act as the active-low open-drain interrupt INTB; pull up with 4.7 kΩ to VI2C; unused pin may be left open or floating."
      },
      {
        "number": "26",
        "name": "GPIO2",
        "type": "bidirectional",
        "description": "General purpose input/output at VDDIO logic levels with a 25 kΩ typical pulldown by default; unused GPIOs can be left open or floating."
      },
      {
        "number": "27",
        "name": "GPIO1",
        "type": "bidirectional",
        "description": "General purpose input/output at VDDIO logic levels with a 25 kΩ typical pulldown by default; unused GPIOs can be left open or floating."
      },
      {
        "number": "28",
        "name": "GPIO0",
        "type": "bidirectional",
        "description": "General purpose input/output at VDDIO logic levels with a 25 kΩ typical pulldown by default; unused GPIOs can be left open or floating."
      },
      {
        "number": "29",
        "name": "VDDIO",
        "type": "power_in",
        "description": "Supply for the single-ended outputs and control inputs, connectable to 1.8 V ±5% or 3 V to 3.6 V; each pin requires a minimum 10 nF capacitor to GND."
      },
      {
        "number": "30",
        "name": "PDB",
        "type": "input",
        "description": "Active-high power-down input with 50 kΩ internal pulldown; the device is enabled when high and powered down when low, and the input is 3.3 V tolerant."
      },
      {
        "number": "31",
        "name": "VDD18_FPD1",
        "type": "power_in",
        "description": "1.8-V ±5% high-speed transceiver (HSTRX) analog supply; requires 10 µF, 0.1 µF, and 0.01 µF capacitors to GND at each VDD pin."
      },
      {
        "number": "32",
        "name": "RIN1+",
        "type": "bidirectional",
        "description": "Receive input channel 1 positive FPD-Link III input and bidirectional control back-channel output; must be AC coupled, with internal 100 Ω differential termination to RIN1-."
      },
      {
        "number": "33",
        "name": "RIN1-",
        "type": "bidirectional",
        "description": "Receive input channel 1 negative FPD-Link III input and bidirectional control back-channel output; must be AC coupled, with internal 100 Ω differential termination to RIN1+."
      },
      {
        "number": "34",
        "name": "VDD11_FPD",
        "type": "passive",
        "description": "Decoupling connection for the internal analog 1.1-V regulator; requires a minimum 4.7 µF capacitor to GND and must not be connected to other 1.1-V rails."
      },
      {
        "number": "35",
        "name": "IDX",
        "type": "input",
        "description": "I2C device ID strap input, set with a resistor divider between VDD18 (pin 17) and GND to select one of 8 I2C addresses (see Table 5-7)."
      },
      {
        "number": "36",
        "name": "VDD18_P1",
        "type": "power_in",
        "description": "1.8-V ±5% PLL supply; requires 1 µF, 0.1 µF, and 0.01 µF capacitors to GND at each VDD pin."
      },
      {
        "number": "37",
        "name": "MODE",
        "type": "input",
        "description": "Mode select strap input, set with a resistor divider between VDD18 (pin 17) and GND to select coax/STP and RX mode (see Table 5-2)."
      },
      {
        "number": "38",
        "name": "CMLOUTP",
        "type": "output",
        "description": "Channel monitor loop-through differential output, typically left unconnected or routed to test points; terminate with a 100 Ω differential load for monitoring."
      },
      {
        "number": "39",
        "name": "CMLOUTN",
        "type": "output",
        "description": "Channel monitor loop-through differential output, typically left unconnected or routed to test points; terminate with a 100 Ω differential load for monitoring."
      },
      {
        "number": "40",
        "name": "VDD18_FPD0",
        "type": "power_in",
        "description": "1.8-V ±5% high-speed transceiver (HSTRX) analog supply; requires 10 µF, 0.1 µF, and 0.01 µF capacitors to GND at each VDD pin."
      },
      {
        "number": "41",
        "name": "RIN0+",
        "type": "bidirectional",
        "description": "Receive input channel 0 positive FPD-Link III input and bidirectional control back-channel output; must be AC coupled, with internal 100 Ω differential termination to RIN0-."
      },
      {
        "number": "42",
        "name": "RIN0-",
        "type": "bidirectional",
        "description": "Receive input channel 0 negative FPD-Link III input and bidirectional control back-channel output; must be AC coupled, with internal 100 Ω differential termination to RIN0+."
      },
      {
        "number": "43",
        "name": "RES",
        "type": "passive",
        "description": "Reserved pin with internal pull-up resistor; must be tied to GND for normal operation."
      },
      {
        "number": "44",
        "name": "RES",
        "type": "passive",
        "description": "Reserved pin; must be left No Connect or tied to GND for normal operation."
      },
      {
        "number": "45",
        "name": "VDD18_P0",
        "type": "power_in",
        "description": "1.8-V ±5% PLL supply; requires 1 µF, 0.1 µF, and 0.01 µF capacitors to GND at each VDD pin."
      },
      {
        "number": "46",
        "name": "SEL",
        "type": "input",
        "description": "MUX select input: low selects RIN0 (channel A) and high selects RIN1 (channel B) as the active channel; 25 kΩ internal pulldown and VDDIO logic levels."
      },
      {
        "number": "47",
        "name": "PASS",
        "type": "output",
        "description": "PASS output: high indicates error-free forward channel transmission and low indicates one or more errors in the received payload; VDDIO logic levels, leave No Connect if unused."
      },
      {
        "number": "48",
        "name": "LOCK",
        "type": "output",
        "description": "LOCK status output: high when the PLL is locked and outputs are active, low when unlocked; VDDIO logic levels."
      },
      {
        "number": "49",
        "name": "DAP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The DAP is not given a numbered pin; it is listed as 'DAP' in Table 4-1 and Figure 4-1 and is includ; Pin types for VDD11_D (3), VDD11_DVP (20) and VDD11_FPD (34) are regulator decoupling nodes, not sup; Pins 43 and 44 are marked RES (reserved) with no ERC class in the datasheet. Pin 43 must be tied to ",
          "exposed pad 49 added from the footprint",
          "dropped thermal pad ['EP'] absent from footprint"
        ],
        "pages_sent": 84,
        "cost_usd": 0.4368,
        "at": "2026-11-11T01:34:22"
      },
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/ds90ub934-q1.pdf",
        "pages": 84,
        "sha256": "2c613563cb56bb71",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 49,
        "described": 49,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
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    "models_3d": [
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        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
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        "sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
        "checked": "2026-11-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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        "sha256": "ec4f852d57842212fa21a337324d0ea9cc0b26cda2c7b2a6bd420ce2f4bcbc08",
        "checked": "2026-11-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "RGZ",
      "source_page": 81,
      "D": {
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        "range_mm": [
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      },
      "E1": {
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      "e": {
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      },
      "A": {
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      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
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        "verdict": "PASS",
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}