component
DS90UB934TRGZRQ1
Public Made by Adomby adom
Texas Instruments LVDS ICs, VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
ds90ub934trgzrq1: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
2 files changed
+110−30
package.json+68−28@@ -53,43 +53,43 @@ "number": "1", "name": "I2C_SDA", "type": "bidirectional",- "description": "I2C serial data line for bidirectional control bus communication with external 2-k\u03a9 to 4.7-k\u03a9 pullup resistor to VI2C recommended."+ "description": "I2C serial data line for bidirectional control bus communication with external 2-kΩ to 4.7-kΩ pullup resistor to VI2C recommended." }, { "number": "2", "name": "I2C_SCL", "type": "bidirectional",- "description": "I2C serial clock line for bidirectional control bus communication with external 2-k\u03a9 to 4.7-k\u03a9 pullup resistor to VI2C recommended."+ "description": "I2C serial clock line for bidirectional control bus communication with external 2-kΩ to 4.7-kΩ pullup resistor to VI2C recommended." }, { "number": "3", "name": "VDD11_D", "type": "passive",- "description": "Decoupling capacitor connection for internal digital regulator, requires minimum 4.7-\u03bcF capacitor to GND."+ "description": "Decoupling capacitor connection for internal digital regulator, requires minimum 4.7-μF capacitor to GND." }, { "number": "4", "name": "OSS_SEL", "type": "input",- "description": "Output sleep state select pin with 25-k\u03a9 internal pulldown; if unused connect to VDD with \u22644.3-k\u03a9 pullup resistor."+ "description": "Output sleep state select pin with 25-kΩ internal pulldown; if unused connect to VDD with ≤4.3-kΩ pullup resistor." }, { "number": "5", "name": "OEN", "type": "input",- "description": "Output enable pin with 1-M\u03a9 internal pulldown; if unused connect to VDD with \u22644.3-k\u03a9 pullup resistor."+ "description": "Output enable pin with 1-MΩ internal pulldown; if unused connect to VDD with ≤4.3-kΩ pullup resistor." }, { "number": "6", "name": "BISTEN", "type": "input",- "description": "BIST enable pin with 25-k\u03a9 internal pulldown; when HIGH enables BIST mode for at-speed testing."+ "description": "BIST enable pin with 25-kΩ internal pulldown; when HIGH enables BIST mode for at-speed testing." }, { "number": "7", "name": "VDDIO", "type": "power_in",- "description": "VDDIO voltage supply input for single-ended outputs and control inputs, 1.8V \u00b15% or 3.0-3.6V with minimum 10-nF capacitor to GND."+ "description": "VDDIO voltage supply input for single-ended outputs and control inputs, 1.8V ±5% or 3.0-3.6V with minimum 10-nF capacitor to GND." }, { "number": "8",@@ -149,7 +149,7 @@ "number": "17", "name": "VDD18", "type": "power_in",- "description": "1.8V \u00b15% power supply requiring 1-\u03bcF, 0.1-\u03bcF, and 0.01-\u03bcF capacitors to GND at each VDD pin."+ "description": "1.8V ±5% power supply requiring 1-μF, 0.1-μF, and 0.01-μF capacitors to GND at each VDD pin." }, { "number": "18",@@ -167,7 +167,7 @@ "number": "20", "name": "VDD11_DVP", "type": "passive",- "description": "Decoupling capacitor connection for internal mixed signal regulator, requires minimum 4.7-\u03bcF capacitor to GND."+ "description": "Decoupling capacitor connection for internal mixed signal regulator, requires minimum 4.7-μF capacitor to GND." }, { "number": "21",@@ -197,61 +197,61 @@ "number": "25", "name": "GPIO3/INTB", "type": "bidirectional",- "description": "General purpose input/output or active-low open drain interrupt output, shared pin with pullup to VI2C required at 4.7 k\u03a9."+ "description": "General purpose input/output or active-low open drain interrupt output, shared pin with pullup to VI2C required at 4.7 kΩ." }, { "number": "26", "name": "GPIO2", "type": "bidirectional",- "description": "General purpose input/output with 25-k\u03a9 pulldown; unused pins may be left open or floating at VDDIO logic levels."+ "description": "General purpose input/output with 25-kΩ pulldown; unused pins may be left open or floating at VDDIO logic levels." }, { "number": "27", "name": "GPIO1", "type": "bidirectional",- "description": "General purpose input/output with 25-k\u03a9 pulldown; unused pins may be left open or floating at VDDIO logic levels."+ "description": "General purpose input/output with 25-kΩ pulldown; unused pins may be left open or floating at VDDIO logic levels." }, { "number": "28", "name": "GPIO0", "type": "bidirectional",- "description": "General purpose input/output with 25-k\u03a9 pulldown; unused pins may be left open or floating at VDDIO logic levels."+ "description": "General purpose input/output with 25-kΩ pulldown; unused pins may be left open or floating at VDDIO logic levels." }, { "number": "29", "name": "VDDIO", "type": "power_in",- "description": "VDDIO voltage supply input for single-ended outputs and control inputs, 1.8V \u00b15% or 3.0-3.6V with minimum 10-nF capacitor to GND."+ "description": "VDDIO voltage supply input for single-ended outputs and control inputs, 1.8V ±5% or 3.0-3.6V with minimum 10-nF capacitor to GND." }, { "number": "30", "name": "PDB", "type": "input",- "description": "Power-down inverted input pin with 50-k\u03a9 internal pulldown and 3.3V tolerance; HIGH enables device, LOW powers down."+ "description": "Power-down inverted input pin with 50-kΩ internal pulldown and 3.3V tolerance; HIGH enables device, LOW powers down." }, { "number": "31", "name": "VDD18_FPD1", "type": "power_in",- "description": "1.8V \u00b15% high-speed transceiver analog power supply requiring 10-\u03bcF, 0.1-\u03bcF, and 0.01-\u03bcF capacitors to GND."+ "description": "1.8V ±5% high-speed transceiver analog power supply requiring 10-μF, 0.1-μF, and 0.01-μF capacitors to GND." }, { "number": "32", "name": "RIN1+", "type": "bidirectional",- "description": "Receive input channel 1 positive differential FPD-Link receiver with bidirectional control back channel and internal 100-\u03a9 termination."+ "description": "Receive input channel 1 positive differential FPD-Link receiver with bidirectional control back channel and internal 100-Ω termination." }, { "number": "33", "name": "RIN1-", "type": "bidirectional",- "description": "Receive input channel 1 negative differential FPD-Link receiver with internal 100-\u03a9 termination to RIN1+, AC-coupled input required."+ "description": "Receive input channel 1 negative differential FPD-Link receiver with internal 100-Ω termination to RIN1+, AC-coupled input required." }, { "number": "34", "name": "VDD11_FPD", "type": "passive",- "description": "Decoupling capacitor connection for internal analog regulator, requires minimum 4.7-\u03bcF capacitor to GND."+ "description": "Decoupling capacitor connection for internal analog regulator, requires minimum 4.7-μF capacitor to GND." }, { "number": "35",@@ -263,7 +263,7 @@ "number": "36", "name": "VDD18_P1", "type": "power_in",- "description": "1.8V \u00b15% PLL power supply requiring 1-\u03bcF, 0.1-\u03bcF, and 0.01-\u03bcF capacitors to GND."+ "description": "1.8V ±5% PLL power supply requiring 1-μF, 0.1-μF, and 0.01-μF capacitors to GND." }, { "number": "37",@@ -281,25 +281,25 @@ "number": "39", "name": "CMLOUTN", "type": "output",- "description": "Channel monitor loop-through CML driver differential output negative with 100-\u03a9 differential load termination."+ "description": "Channel monitor loop-through CML driver differential output negative with 100-Ω differential load termination." }, { "number": "40", "name": "VDD18_FPD0", "type": "power_in",- "description": "1.8V \u00b15% high-speed transceiver analog power supply requiring 10-\u03bcF, 0.1-\u03bcF, and 0.01-\u03bcF capacitors to GND."+ "description": "1.8V ±5% high-speed transceiver analog power supply requiring 10-μF, 0.1-μF, and 0.01-μF capacitors to GND." }, { "number": "41", "name": "RIN0+", "type": "bidirectional",- "description": "Receive input channel 0 positive differential FPD-Link receiver with bidirectional control back channel and internal 100-\u03a9 termination."+ "description": "Receive input channel 0 positive differential FPD-Link receiver with bidirectional control back channel and internal 100-Ω termination." }, { "number": "42", "name": "RIN0-", "type": "bidirectional",- "description": "Receive input channel 0 negative differential FPD-Link receiver with internal 100-\u03a9 termination to RIN0+, AC-coupled input required."+ "description": "Receive input channel 0 negative differential FPD-Link receiver with internal 100-Ω termination to RIN0+, AC-coupled input required." }, { "number": "43",@@ -317,13 +317,13 @@ "number": "45", "name": "VDD18_P0", "type": "power_in",- "description": "1.8V \u00b15% PLL power supply requiring 1-\u03bcF, 0.1-\u03bcF, and 0.01-\u03bcF capacitors to GND."+ "description": "1.8V ±5% PLL power supply requiring 1-μF, 0.1-μF, and 0.01-μF capacitors to GND." }, { "number": "46", "name": "SEL", "type": "input",- "description": "MUX select digital input with 25-k\u03a9 internal pulldown for selecting FPD Link input channel 0 or 1 at VDDIO logic levels."+ "description": "MUX select digital input with 25-kΩ internal pulldown for selecting FPD Link input channel 0 or 1 at VDDIO logic levels." }, { "number": "47",@@ -379,6 +379,46 @@ "viewers": { "symbol": "viewers/symbol.html", "footprint": "viewers/footprint.html"- }+ },+ "models_3d": [+ {+ "file": "ds90ub934trgzrq1.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7.0,+ 7.0,+ 0.77+ ],+ "zmin_mm": 0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "ds90ub934trgzrq1-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7.0,+ 7.0,+ 0.77+ ],+ "zmin_mm": 0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "d68fb187ef9d9aaaa34c77f6a494e1a54a3499e99a03478ebab0de0e815afc58",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ] }-}+}
page.json+42−2@@ -364,7 +364,47 @@ "viewers": { "symbol": "viewers/symbol.html", "footprint": "viewers/footprint.html"- }+ },+ "models_3d": [+ {+ "file": "ds90ub934trgzrq1.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7.0,+ 7.0,+ 0.77+ ],+ "zmin_mm": 0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "ds90ub934trgzrq1-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7.0,+ 7.0,+ 0.77+ ],+ "zmin_mm": 0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "d68fb187ef9d9aaaa34c77f6a494e1a54a3499e99a03478ebab0de0e815afc58",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ] }, "metadata": { "specs": {@@ -412,4 +452,4 @@ "public": true }, "updated_at": "2026-09-24T20:09:30.745Z"-}+}