component
DS90UB927QSQE
Public Made by Adomby adom
Texas Instruments Serializers / Deserializers, WQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "ds90ub927qsqe",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments Serializers / Deserializers, WQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"communication interface chip-uart-485-232",
"ds90ub927qsqe",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"ds90ub927qsqe.kicad_sym",
"ds90ub927qsqe.kicad_mod",
"ds90ub927qsqe.glb",
"ds90ub927qsqe.step",
"ds90ub927qsqe.lbr",
"docs/hero.png",
"docs/ds90ub927qsqe-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"ds90ub927qsqe-hero.glb",
"ds90ub927qsqe-hero.overlay.json"
],
"component": {
"mpn": "DS90UB927QSQE",
"manufacturer": "Texas Instruments",
"package": "WQFN-40-EP(6x6)",
"pin_count": 41,
"category": "Communication Interface Chip/UART/485/232",
"subcategory": "Serializers / Deserializers",
"datasheet": "https://www.ti.com/cn/lit/gpn/ds90ub927q-q1",
"parts": {
"symbol": "ds90ub927qsqe.kicad_sym",
"footprint": "ds90ub927qsqe.kicad_mod",
"model_3d": "ds90ub927qsqe-hero.glb",
"model_3d_plain": "ds90ub927qsqe.glb",
"model_3d_step": "ds90ub927qsqe-etched.step",
"model_3d_step_plain": "ds90ub927qsqe.step",
"lbr": "ds90ub927qsqe.lbr"
},
"distributor_links": {
"lcsc": "C2672701"
},
"distributor_check": {
"checked_at": "2026-10-08T23:00:30Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": null,
"status": "no match"
}
},
"pins": [
{
"number": "1",
"name": "I2S_WC",
"type": "input",
"description": "I2S word clock and bit clock input with internal pulldown, LVCMOS levels referenced to VDDIO; shared with GPIO_REG7."
},
{
"number": "2",
"name": "I2S_CLK",
"type": "input",
"description": "I2S bit clock input with internal pulldown, LVCMOS levels referenced to VDDIO; shared with GPIO_REG8."
},
{
"number": "3",
"name": "I2S_DA",
"type": "input",
"description": "I2S digital audio data input with internal pulldown, LVCMOS levels referenced to VDDIO; shared with GPIO_REG6."
},
{
"number": "4",
"name": "I2S_DB",
"type": "input",
"description": "I2S digital audio data input with internal pulldown, LVCMOS levels referenced to VDDIO; shared with GPIO_REG5."
},
{
"number": "5",
"name": "I2S_DC",
"type": "input",
"description": "I2S digital audio data input with internal pulldown, LVCMOS levels referenced to VDDIO; shared with GPIO2."
},
{
"number": "6",
"name": "I2S_DD",
"type": "input",
"description": "I2S digital audio data input with internal pulldown, LVCMOS levels referenced to VDDIO; shared with GPIO3."
},
{
"number": "7",
"name": "VDDIO",
"type": "power_in",
"description": "LVCMOS I/O power, 1.8 V ±5% or 3.0 V to 3.6 V; each VDDIO pin requires a 4.7-µF capacitor to GND."
},
{
"number": "8",
"name": "CAPL12",
"type": "passive",
"description": "Decoupling capacitor connection for the on-chip 1.2 V regulator; requires 4.7-µF decoupling capacitor(s) to GND."
},
{
"number": "9",
"name": "SCL",
"type": "bidirectional",
"description": "I2C clock input/output, open drain; must have an external pullup to VDD33 (recommended 4.7 kΩ) and must not float."
},
{
"number": "10",
"name": "SDA",
"type": "bidirectional",
"description": "I2C data input/output, open drain; must have an external pullup to VDD33 (recommended 4.7 kΩ) and must not float."
},
{
"number": "11",
"name": "IDx",
"type": "passive",
"description": "I2C address select analog input; connect to an external pullup to VDD33 and a pulldown to GND as a voltage divider, and do not float."
},
{
"number": "12",
"name": "CAPP12",
"type": "passive",
"description": "Decoupling capacitor connection for the on-chip 1.2 V regulator; requires 4.7-µF decoupling capacitor(s) to GND."
},
{
"number": "13",
"name": "RES0",
"type": "power_in",
"description": "Reserved pin; connect to GND."
},
{
"number": "14",
"name": "CAPHS12",
"type": "passive",
"description": "Decoupling capacitor connection for the on-chip 1.2 V regulator; requires a 4.7-µF decoupling capacitor to GND."
},
{
"number": "15",
"name": "RES1",
"type": "power_in",
"description": "Reserved pin; connect to GND."
},
{
"number": "16",
"name": "DOUT-",
"type": "output",
"description": "Inverting FPD-Link III serial output; must be AC-coupled with a 0.1-µF capacitor."
},
{
"number": "17",
"name": "DOUT+",
"type": "output",
"description": "True FPD-Link III serial output; must be AC-coupled with a 0.1-µF capacitor."
},
{
"number": "18",
"name": "PDB",
"type": "input",
"description": "Power-down input with internal pulldown; must be driven or pulled up to VDD33 - high enables the device, low powers it down with driver outputs HIGH and PLL shut down."
},
{
"number": "19",
"name": "VDD33_A",
"type": "power_in",
"description": "Power to the on-chip regulator, 3.0 V to 3.6 V; must be bypassed with a 4.7-µF capacitor to GND and driven to the same potential as VDD33_B."
},
{
"number": "20",
"name": "CMF",
"type": "passive",
"description": "Common mode filter; connect a 0.1-µF capacitor to GND (required)."
},
{
"number": "21",
"name": "REPEAT",
"type": "input",
"description": "Repeater mode select with internal pulldown; low disables repeater mode (default), high enables it, and a 10-kΩ pullup is required if set HIGH."
},
{
"number": "22",
"name": "BKWD",
"type": "input",
"description": "Backward compatible mode select with internal pulldown; low selects DS90UH926/8Q-Q1 (default), high selects DS90UR906/8Q-Q1 or DS90UR916Q, and a 10-kΩ pullup is required if set HIGH."
},
{
"number": "23",
"name": "MAPSEL",
"type": "input",
"description": "FPD-Link input map select with internal pulldown; low places LSBs on RxIN3± (default), high places MSBs on RxIN3±, and a 10-kΩ pullup is required if set HIGH."
},
{
"number": "24",
"name": "VDDIO",
"type": "power_in",
"description": "LVCMOS I/O power, 1.8 V ±5% or 3.0 V to 3.6 V; each VDDIO pin requires a 4.7-µF capacitor to GND."
},
{
"number": "25",
"name": "LFMODE",
"type": "input",
"description": "Low-frequency mode select with internal pulldown; low selects 15 MHz to 85 MHz RxCLKIN (default), high selects 5 MHz to below 15 MHz, and a 10-kΩ pullup is required if set HIGH."
},
{
"number": "26",
"name": "VDD33_B",
"type": "power_in",
"description": "Power to the on-chip regulator, 3.0 V to 3.6 V; must be bypassed with a 4.7-µF capacitor to GND and driven to the same potential as VDD33_A."
},
{
"number": "27",
"name": "INTB",
"type": "output",
"description": "Open-drain interrupt output; high for normal operation, low for an interrupt request, with a recommended 4.7-kΩ pullup to VDDIO that must not float."
},
{
"number": "28",
"name": "CAPLVD12",
"type": "passive",
"description": "Decoupling capacitor connection for the on-chip 1.2 V regulator; requires a 4.7-µF decoupling capacitor to GND."
},
{
"number": "29",
"name": "RxIN0-",
"type": "input",
"description": "Inverting FPD-Link input data pair; requires external 100-Ω differential termination for standard LVDS levels."
},
{
"number": "30",
"name": "RxIN0+",
"type": "input",
"description": "True FPD-Link input data pair; requires external 100-Ω differential termination for standard LVDS levels."
},
{
"number": "31",
"name": "RxIN1-",
"type": "input",
"description": "Inverting FPD-Link input data pair; requires external 100-Ω differential termination for standard LVDS levels."
},
{
"number": "32",
"name": "RxIN1+",
"type": "input",
"description": "True FPD-Link input data pair; requires external 100-Ω differential termination for standard LVDS levels."
},
{
"number": "33",
"name": "RxIN2-",
"type": "input",
"description": "Inverting FPD-Link input data pair; requires external 100-Ω differential termination for standard LVDS levels."
},
{
"number": "34",
"name": "RxIN2+",
"type": "input",
"description": "True FPD-Link input data pair; requires external 100-Ω differential termination for standard LVDS levels."
},
{
"number": "35",
"name": "RxCLKIN-",
"type": "input",
"description": "Inverting FPD-Link LVDS clock input; requires external 100-Ω differential termination for standard LVDS levels."
},
{
"number": "36",
"name": "RxCLKIN+",
"type": "input",
"description": "True FPD-Link LVDS clock input; requires external 100-Ω differential termination for standard LVDS levels."
},
{
"number": "37",
"name": "RxIN3-",
"type": "input",
"description": "Inverting FPD-Link input data pair; requires external 100-Ω differential termination for standard LVDS levels."
},
{
"number": "38",
"name": "RxIN3+",
"type": "input",
"description": "True FPD-Link input data pair; requires external 100-Ω differential termination for standard LVDS levels."
},
{
"number": "39",
"name": "GPIO0",
"type": "bidirectional",
"description": "General-purpose LVCMOS I/O with internal pulldown, referenced to VDDIO."
},
{
"number": "40",
"name": "GPIO1",
"type": "bidirectional",
"description": "General-purpose LVCMOS I/O with internal pulldown, referenced to VDDIO."
},
{
"number": "41",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The datasheet's pin table lists DOUT-/DOUT+ as I/O LVDS; they are typed as output here because this ; RES0 and RES1 are reserved pins specified only as 'Connect to GND'; typed power_in per the GND conve; Pins are multiplexed (I2S inputs shared with GPIO_REG/GPIO I/O). Typed as input for I2S and bidirect",
"exposed pad 41 added from the footprint",
"dropped thermal pad ['EP'] absent from footprint"
],
"pages_sent": 12,
"cost_usd": 0.1094,
"at": "2026-10-08T22:59:36"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/ds90ub927q-q1",
"pages": 59,
"sha256": "3a7797546947a1ee",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 41,
"described": 41,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "ds90ub927qsqe.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
6.0,
1.0
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "e5b4286c2329085d9ef7f90d5eb5bf41a435241ecc1baaf1383823b6d6a946ae",
"checked": "2026-10-08",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ds90ub927qsqe-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
6.0,
1.0
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "c39b91819b4aa5f548d0714024cfc354a0dba99dd15e9096593804284d7d28e0",
"checked": "2026-10-08",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}