component
DS90UB914QSQX
Public Made by Adomby adom
Texas Instruments Serializers, Deserializers, WQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "ds90ub914qsqx",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments Serializers, Deserializers, WQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"interface",
"ds90ub914qsqx",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"ds90ub914qsqx.kicad_sym",
"ds90ub914qsqx.kicad_mod",
"ds90ub914qsqx.glb",
"ds90ub914qsqx.step",
"ds90ub914qsqx.lbr",
"docs/hero.png",
"docs/ds90ub914qsqx-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"ds90ub914qsqx-hero.glb",
"ds90ub914qsqx-hero.overlay.json"
],
"component": {
"mpn": "DS90UB914QSQX",
"manufacturer": "Texas Instruments",
"package": "WQFN-48-EP(7x7)",
"pin_count": 49,
"category": "Interface",
"subcategory": "Serializers, Deserializers",
"datasheet": "https://www.ti.com/cn/lit/gpn/ds90ub914q-q1",
"parts": {
"symbol": "ds90ub914qsqx.kicad_sym",
"footprint": "ds90ub914qsqx.kicad_mod",
"model_3d": "ds90ub914qsqx-hero.glb",
"model_3d_plain": "ds90ub914qsqx.glb",
"model_3d_step": "ds90ub914qsqx-etched.step",
"model_3d_step_plain": "ds90ub914qsqx.step",
"lbr": "ds90ub914qsqx.lbr"
},
"distributor_links": {
"lcsc": "C2652238"
},
"distributor_check": {
"checked_at": "2026-10-08T20:11:04Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": null,
"status": "no match"
}
},
"pins": [
{
"number": "1",
"name": "SDA",
"type": "bidirectional",
"description": "Open-drain data line for the I2C-compatible bidirectional control bus; requires an external pullup resistor to VDDIO."
},
{
"number": "2",
"name": "SCL",
"type": "bidirectional",
"description": "Open-drain clock line for the I2C-compatible bidirectional control bus; requires an external pullup resistor to VDDIO."
},
{
"number": "3",
"name": "VDDSSCG",
"type": "power_in",
"description": "SSCG PLL analog power, 1.8 V ±5%."
},
{
"number": "4",
"name": "OSS_SEL",
"type": "input",
"description": "LVCMOS output sleep state select input with pulldown; works with OEN to set output states per Table 5."
},
{
"number": "5",
"name": "OEN",
"type": "input",
"description": "LVCMOS output enable input with pulldown; see Table 5 for output states."
},
{
"number": "6",
"name": "BISTEN",
"type": "input",
"description": "BIST enable input with pulldown; H enables BIST mode, L disables it."
},
{
"number": "7",
"name": "VDDIO3",
"type": "power_in",
"description": "LVCMOS I/O buffer power for outputs and control inputs, 1.8 V ±5% or 3.3 V ±10%."
},
{
"number": "8",
"name": "PCLK",
"type": "output",
"description": "LVCMOS pixel clock output; strobe edge set by the RRFB control register."
},
{
"number": "9",
"name": "VSYNC",
"type": "output",
"description": "LVCMOS vertical SYNC output."
},
{
"number": "10",
"name": "HSYNC",
"type": "output",
"description": "LVCMOS horizontal SYNC output."
},
{
"number": "11",
"name": "ROUT[11]",
"type": "output",
"description": "LVCMOS parallel data output bit 11."
},
{
"number": "12",
"name": "ROUT[10]",
"type": "output",
"description": "LVCMOS parallel data output bit 10."
},
{
"number": "13",
"name": "ROUT[9]",
"type": "output",
"description": "LVCMOS parallel data output bit 9."
},
{
"number": "14",
"name": "ROUT[8]",
"type": "output",
"description": "LVCMOS parallel data output bit 8."
},
{
"number": "15",
"name": "ROUT[7]",
"type": "output",
"description": "LVCMOS parallel data output bit 7."
},
{
"number": "16",
"name": "ROUT[6]",
"type": "output",
"description": "LVCMOS parallel data output bit 6."
},
{
"number": "17",
"name": "VDDD",
"type": "power_in",
"description": "Digital core power, 1.8 V ±5%."
},
{
"number": "18",
"name": "ROUT[5]",
"type": "output",
"description": "LVCMOS parallel data output bit 5."
},
{
"number": "19",
"name": "ROUT[4]",
"type": "output",
"description": "LVCMOS parallel data output bit 4."
},
{
"number": "20",
"name": "VDDIO2",
"type": "power_in",
"description": "LVCMOS I/O buffer power for outputs and control inputs, 1.8 V ±5% or 3.3 V ±10%."
},
{
"number": "21",
"name": "ROUT[3]",
"type": "output",
"description": "LVCMOS parallel data output bit 3."
},
{
"number": "22",
"name": "ROUT[2]",
"type": "output",
"description": "LVCMOS parallel data output bit 2."
},
{
"number": "23",
"name": "ROUT[1]",
"type": "output",
"description": "LVCMOS parallel data output bit 1."
},
{
"number": "24",
"name": "ROUT[0]",
"type": "output",
"description": "LVCMOS parallel data output bit 0."
},
{
"number": "25",
"name": "GPIO[3]",
"type": "bidirectional",
"description": "LVCMOS general-purpose I/O that can be input for serializer GPO3 or output following local register; output-only with an external oscillator."
},
{
"number": "26",
"name": "GPIO[2]",
"type": "bidirectional",
"description": "LVCMOS general-purpose I/O that can be input for serializer GPO2 or output following local register; output-only with an external oscillator."
},
{
"number": "27",
"name": "GPIO[1]",
"type": "bidirectional",
"description": "LVCMOS general-purpose I/O that can be input for the corresponding serializer GPO or output following local register settings."
},
{
"number": "28",
"name": "GPIO[0]",
"type": "bidirectional",
"description": "LVCMOS general-purpose I/O that can be input for the corresponding serializer GPO or output following local register settings."
},
{
"number": "29",
"name": "VDDIO1",
"type": "power_in",
"description": "LVCMOS I/O buffer power for outputs and control inputs, 1.8 V ±5% or 3.3 V ±10%."
},
{
"number": "30",
"name": "PDB",
"type": "input",
"description": "Power-down input with pulldown; H enables the deserializer, L puts it in sleep and register data are not retained."
},
{
"number": "31",
"name": "VDDCML1",
"type": "power_in",
"description": "CML and bidirectional control channel driver power, 1.8 V ±5%."
},
{
"number": "32",
"name": "RIN1+",
"type": "bidirectional",
"description": "Noninverting CML differential input and bidirectional control channel; must be AC coupled with a 100-nF capacitor."
},
{
"number": "33",
"name": "RIN1-",
"type": "bidirectional",
"description": "Inverting CML differential input and bidirectional control channel; must be AC coupled with a 100-nF capacitor."
},
{
"number": "34",
"name": "IDx[1]",
"type": "input",
"description": "Analog I2C device address select input, set by a resistor to ground with a 10-kΩ pullup to the 1.8-V rail."
},
{
"number": "35",
"name": "IDx[0]",
"type": "input",
"description": "Analog I2C device address select input, set by a resistor to ground with a 10-kΩ pullup to the 1.8-V rail."
},
{
"number": "36",
"name": "VDDR",
"type": "power_in",
"description": "RX analog power, 1.8 V ±5%."
},
{
"number": "37",
"name": "MODE",
"type": "input",
"description": "Mode select input with pullup; resistor to ground and 10-kΩ pullup to 1.8 V selects 12-bit low-frequency (10-50 MHz), 12-bit high-frequency (15-75 MHz) or 10-bit (20-100 MHz) mode."
},
{
"number": "38",
"name": "CMLOUTP",
"type": "output",
"description": "CML test output; route to a test point or leave open if unused."
},
{
"number": "39",
"name": "CMLOUTN",
"type": "output",
"description": "CML test output; route to a test point or leave open if unused."
},
{
"number": "40",
"name": "VDDCML0",
"type": "power_in",
"description": "CML and bidirectional control channel driver power, 1.8 V ±5%."
},
{
"number": "41",
"name": "RIN0+",
"type": "bidirectional",
"description": "Noninverting CML differential input and bidirectional control channel; must be AC coupled with a 100-nF capacitor."
},
{
"number": "42",
"name": "RIN0-",
"type": "bidirectional",
"description": "Inverting CML differential input and bidirectional control channel; must be AC coupled with a 100-nF capacitor."
},
{
"number": "43",
"name": "RES",
"type": "input",
"description": "Reserved; this pin must always be tied low."
},
{
"number": "44",
"name": "RES",
"type": "input",
"description": "Reserved; this pin must always be tied low."
},
{
"number": "45",
"name": "VDDPLL",
"type": "power_in",
"description": "PLL analog power, 1.8 V ±5%."
},
{
"number": "46",
"name": "SEL",
"type": "input",
"description": "MUX select input with pulldown; L selects RIN0± (input A), H selects RIN1± (input B) as the active channel."
},
{
"number": "47",
"name": "PASS",
"type": "output",
"description": "BIST pass output; H means error-free transmission, L means one or more errors detected; leave open if unused."
},
{
"number": "48",
"name": "LOCK",
"type": "output",
"description": "Lock status output; H means PLL locked and outputs active, L means unlocked with output states set by OSS_SEL."
},
{
"number": "49",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The datasheet lists ROUT[11:0] only as a pin set (11,12,13,14,15,16,18,19,21,22,23,24). The bit-to-p; The table lists CMLOUTP/N at pins 38, 39 without stating which is P and which is N. The P=38 / N=39 ; The exposed pad is not a numbered pin; it is listed as 'DAP = GND' in the datasheet. It is included ",
"exposed pad 49 added from the footprint",
"dropped thermal pad ['EP'] absent from footprint"
],
"pages_sent": 22,
"cost_usd": 0.1527,
"at": "2026-10-08T20:10:44"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/ds90ub914q-q1",
"pages": 74,
"sha256": "17f29c7167b0a48e",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 49,
"described": 49,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "ds90ub914qsqx.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.0,
7.0,
0.77
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
"checked": "2026-10-08",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ds90ub914qsqx-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.0,
7.0,
0.77
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "44b4212237ab281b0999f1e8b319573850565ebb7f20e871394786ba829385d6",
"checked": "2026-10-08",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}