component
DS90UB914ATRHSRQ1
Public Made by Adomby adom
Texas Instruments Serializers / Deserializers, WQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "ds90ub914atrhsrq1",
"title": "DS90UB914ATRHSRQ1",
"brief": "Texas Instruments Serializers / Deserializers, WQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"interface ics",
"ds90ub914atrhsrq1",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "DS90UB914ATRHSRQ1",
"manufacturer": "Texas Instruments",
"package": "WQFN-48-EP(7x7)",
"pin_count": 49,
"category": "Interface ICs",
"subcategory": "Serializers / Deserializers",
"datasheet": "https://www.ti.com/cn/lit/gpn/ds90ub914a-q1",
"parts": {
"symbol": "ds90ub914atrhsrq1.kicad_sym",
"footprint": "ds90ub914atrhsrq1.kicad_mod",
"model_3d": "ds90ub914atrhsrq1-hero.glb",
"model_3d_plain": "ds90ub914atrhsrq1-etched.glb",
"model_3d_step": "ds90ub914atrhsrq1-etched.step",
"model_3d_step_plain": "ds90ub914atrhsrq1.step",
"lbr": "ds90ub914atrhsrq1.lbr"
},
"distributor_links": {
"lcsc": "C544683",
"digikey": "296-46271-2-ND",
"mouser": "595-S90UB914ATRHSRQ1"
},
"distributor_check": {
"checked_at": "2026-10-30T20:26:28Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-46271-2-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "595-S90UB914ATRHSRQ1",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "SDA",
"type": "bidirectional",
"description": "Data line for the bidirectional control bus (I2C-compatible, open drain) that requires an external pullup resistor to VDDIO."
},
{
"number": "2",
"name": "SCL",
"type": "bidirectional",
"description": "Clock line for the bidirectional control bus (I2C-compatible, open drain) that requires an external pullup resistor to VDDIO."
},
{
"number": "3",
"name": "VDDSSCG",
"type": "power_in",
"description": "SSCG PLL power supply, 1.8 V ±5%."
},
{
"number": "4",
"name": "OSS_SEL",
"type": "input",
"description": "Output Sleep State select pin; sets the ROUT and PCLK output states when LOCK is low, as defined in Table 3."
},
{
"number": "5",
"name": "OEN",
"type": "input",
"description": "Output enable input that controls the output states together with OSS_SEL, as defined in Table 3."
},
{
"number": "6",
"name": "BISTEN",
"type": "input",
"description": "BIST enable pin; BISTEN = H enables BIST mode and BISTEN = L disables it."
},
{
"number": "7",
"name": "VDDIO3",
"type": "power_in",
"description": "LVCMOS I/O buffer power, which can be connected to 1.8 V ±5% or 3.3 V ±10%."
},
{
"number": "8",
"name": "PCLK",
"type": "output",
"description": "Pixel clock output whose strobe edge is set by the RRFB register; it becomes active before LOCK in 12-bit low-frequency and 10-bit modes and at the same time as LOCK in 12-bit high-frequency mode."
},
{
"number": "9",
"name": "VSYNC",
"type": "output",
"description": "Vertical sync LVCMOS output that is restricted to no more than one transition per 10 PCLK cycles in 10-bit mode; leave open if unused."
},
{
"number": "10",
"name": "HSYNC",
"type": "output",
"description": "Horizontal sync LVCMOS output that is restricted to no more than one transition per 10 PCLK cycles in 10-bit mode; leave open if unused."
},
{
"number": "11",
"name": "ROUT[11]",
"type": "output",
"description": "Parallel LVCMOS data output that is active in 12-bit modes and inactive in 10-bit mode, where it should be left as No Connect."
},
{
"number": "12",
"name": "ROUT[10]",
"type": "output",
"description": "Parallel LVCMOS data output that is active in 12-bit modes and inactive in 10-bit mode, where it should be left as No Connect."
},
{
"number": "13",
"name": "ROUT[9]",
"type": "output",
"description": "Parallel LVCMOS data output that is active in both 10-bit and 12-bit modes; unused outputs should be No Connect."
},
{
"number": "14",
"name": "ROUT[8]",
"type": "output",
"description": "Parallel LVCMOS data output that is active in both 10-bit and 12-bit modes; unused outputs should be No Connect."
},
{
"number": "15",
"name": "ROUT[7]",
"type": "output",
"description": "Parallel LVCMOS data output that is active in both 10-bit and 12-bit modes; unused outputs should be No Connect."
},
{
"number": "16",
"name": "ROUT[6]",
"type": "output",
"description": "Parallel LVCMOS data output that is active in both 10-bit and 12-bit modes; unused outputs should be No Connect."
},
{
"number": "17",
"name": "VDDD",
"type": "power_in",
"description": "Digital core power supply, 1.8 V ±5%."
},
{
"number": "18",
"name": "ROUT[5]",
"type": "output",
"description": "Parallel LVCMOS data output that is active in both 10-bit and 12-bit modes; unused outputs should be No Connect."
},
{
"number": "19",
"name": "ROUT[4]",
"type": "output",
"description": "Parallel LVCMOS data output that is active in both 10-bit and 12-bit modes; unused outputs should be No Connect."
},
{
"number": "20",
"name": "VDDIO2",
"type": "power_in",
"description": "LVCMOS I/O buffer power, which can be connected to 1.8 V ±5% or 3.3 V ±10%."
},
{
"number": "21",
"name": "ROUT[3]",
"type": "output",
"description": "Parallel LVCMOS data output that is active in both 10-bit and 12-bit modes; unused outputs should be No Connect."
},
{
"number": "22",
"name": "ROUT[2]",
"type": "output",
"description": "Parallel LVCMOS data output that is active in both 10-bit and 12-bit modes; unused outputs should be No Connect."
},
{
"number": "23",
"name": "ROUT[1]",
"type": "output",
"description": "Parallel LVCMOS data output that is active in both 10-bit and 12-bit modes; unused outputs should be No Connect."
},
{
"number": "24",
"name": "ROUT[0]",
"type": "output",
"description": "Parallel LVCMOS data output that is active in both 10-bit and 12-bit modes; unused outputs should be No Connect."
},
{
"number": "25",
"name": "GPIO[3]",
"type": "bidirectional",
"description": "LVCMOS general-purpose I/O that can be an input for a serializer GPO or an output following local register settings, and should be left open if unused."
},
{
"number": "26",
"name": "GPIO[2]",
"type": "bidirectional",
"description": "LVCMOS general-purpose I/O that can be an input for a serializer GPO or an output following local register settings, and should be left open if unused."
},
{
"number": "27",
"name": "GPIO[1]",
"type": "bidirectional",
"description": "LVCMOS general-purpose I/O that can be used to control and respond to commands, and should be left open if unused."
},
{
"number": "28",
"name": "GPIO[0]",
"type": "bidirectional",
"description": "LVCMOS general-purpose I/O that can be used to control and respond to commands, and should be left open if unused."
},
{
"number": "29",
"name": "VDDIO1",
"type": "power_in",
"description": "LVCMOS I/O buffer power, which can be connected to 1.8 V ±5% or 3.3 V ±10%."
},
{
"number": "30",
"name": "PDB",
"type": "input",
"description": "Power-down pin; PDB = H enables the deserializer, while PDB = L powers it down and resets programmed control register data to default values."
},
{
"number": "31",
"name": "VDDCML1",
"type": "power_in",
"description": "CML and bidirectional control channel drive power, 1.8 V ±5%."
},
{
"number": "32",
"name": "RIN1+",
"type": "bidirectional",
"description": "Noninverting CML differential input for the bidirectional control channel that must be AC-coupled with a 0.1 µF capacitor, or left open if unused."
},
{
"number": "33",
"name": "RIN1-",
"type": "bidirectional",
"description": "Inverting CML differential input for the bidirectional control channel that must be AC-coupled with a 0.1 µF capacitor, or left open if unused; single-ended coax use requires a 0.047 µF AC-coupling capacitor in series with a 50 Ω resistor."
},
{
"number": "34",
"name": "IDx[1]",
"type": "input",
"description": "Device ID address select that sets the I2C slave address, using a resistor to ground and a 10 kΩ pullup to the 1.8 V rail."
},
{
"number": "35",
"name": "IDx[0]",
"type": "input",
"description": "Device ID address select that sets the I2C slave address, using a resistor to ground and a 10 kΩ pullup to the 1.8 V rail."
},
{
"number": "36",
"name": "VDDR",
"type": "power_in",
"description": "Rx analog power supply, 1.8 V ±5%."
},
{
"number": "37",
"name": "MODE",
"type": "input",
"description": "Analog device mode select that sets 12-bit low-frequency, 12-bit high-frequency, or 10-bit operation via a resistor to ground and a 10 kΩ pullup to the 1.8 V rail (VDD, not VDDIO)."
},
{
"number": "38",
"name": "CMLOUTP",
"type": "output",
"description": "CML loop-through output, to be routed to a test point or left open if unused."
},
{
"number": "39",
"name": "CMLOUTN",
"type": "output",
"description": "CML loop-through output, to be routed to a test point or left open if unused."
},
{
"number": "40",
"name": "VDDCML0",
"type": "power_in",
"description": "CML and bidirectional control channel drive power, 1.8 V ±5%."
},
{
"number": "41",
"name": "RIN0+",
"type": "bidirectional",
"description": "Noninverting CML differential input for the FPD-Link III and bidirectional control channel that must be AC-coupled with a 0.1 µF capacitor, or left open if unused."
},
{
"number": "42",
"name": "RIN0-",
"type": "bidirectional",
"description": "Inverting CML differential input for the FPD-Link III and bidirectional control channel that must be AC-coupled with a 0.1 µF capacitor, or left open if unused; single-ended coax use requires a 0.047 µF AC-coupling capacitor in series with a 50 Ω resistor."
},
{
"number": "43",
"name": "RES",
"type": "passive",
"description": "Reserved pin that must always be tied low."
},
{
"number": "44",
"name": "RES",
"type": "passive",
"description": "Reserved pin that must always be tied low."
},
{
"number": "45",
"name": "VDDPLL",
"type": "power_in",
"description": "PLL power supply, 1.8 V ±5%."
},
{
"number": "46",
"name": "SEL",
"type": "input",
"description": "MUX select line: SEL = L selects the RIN0± input (input A) and SEL = H selects the RIN1± input (input B)."
},
{
"number": "47",
"name": "PASS",
"type": "output",
"description": "BIST pass output that is H for error-free transmission and L when one or more errors are detected in the payload; leave open if unused."
},
{
"number": "48",
"name": "LOCK",
"type": "output",
"description": "PLL lock status output that is H when locked and outputs are active, and L when unlocked, in which case ROUT and PCLK follow OSS_SEL; it may be used as a link status."
},
{
"number": "49",
"name": "DAP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The datasheet lists the ROUT[11:0] pin numbers as an ordered group (11,12,13,14,15,16,18,19,21,22,23; GPIO[3:2] is listed as pins 25,26 and GPIO[1:0] as pins 27,28, which gives the per-bit mapping shown; IDx[0:1] is listed as pins 35,34, so IDx[0] = pin 35 and IDx[1] = pin 34 are inferred from that orde",
"exposed pad 49 added from the footprint",
"3/49 pins cited to the wrong page (name found elsewhere): ['20:VDDIO2@p8', '31:VDDCML1@p8', '39:CMLOUTN@p8']"
],
"pages_sent": 31,
"cost_usd": 0.1943,
"at": "2026-10-30T20:26:10"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/ds90ub914a-q1",
"pages": 69,
"sha256": "d4b97b56a1a2bbaf",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 49,
"described": 49,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "ds90ub914atrhsrq1.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7,
7,
0.77
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ds90ub914atrhsrq1-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7,
7,
0.77
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "0d37454be51fdfdda73ebf5a297615892e26ea8ee6fab064e5b176fecd5053f5",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
],
"package_dims": {
"package_code": "RHS0048A (WQFN-48)",
"source_page": 66,
"D": {
"nom_mm": 7,
"range_mm": [
6.85,
7.15
]
},
"E1": {
"nom_mm": 7,
"range_mm": [
6.85,
7.15
]
},
"e": {
"nom_mm": 0.5,
"range_mm": [
null,
null
]
},
"A": {
"nom_mm": 0.75,
"range_mm": [
0.7,
0.8
]
},
"source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
"model_check": {
"file": "ds90ub914atrhsrq1.step",
"verdict": "PASS",
"reasons": [
"height within the datasheet's package drawing"
],
"by": "factory/package_fit.py"
}
}
},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "WQFN-48-EP(7x7)",
"Category": "Interface ICs",
"Pins": "49"
},
"characteristics": {
"version": 1,
"source": "datasheet",
"datasheet_sha256": "d4b97b56a1a2bbaffe099297d3ae1c713fa8d9354f951bcdc13539ed35ac4ee4",
"rows": [
{
"name": "Supply voltage – VDD_n (1.8 V)",
"symbol": "",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 2.5,
"conditions": "",
"source_page": 9,
"source": "datasheet"
},
{
"name": "Supply voltage – VDDIO",
"symbol": "",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 4,
"conditions": "",
"source_page": 9,
"source": "datasheet"
},
{
"name": "LVCMOS input voltage",
"symbol": "",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": null,
"conditions": "max printed as VDDIO + 0.3",
"source_page": 9,
"source": "datasheet"
},
{
"name": "CML receiver I/O voltage (VDD)",
"symbol": "",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": null,
"conditions": "max printed as VDD + 0.3",
"source_page": 9,
"source": "datasheet"
},
{
"name": "Junction temperature",
"symbol": "",
"kind": "absolute_maximum",
"unit": "°C",
"min": null,
"typ": null,
"max": 150,
"conditions": "",
"source_page": 9,
"source": "datasheet"
},
{
"name": "Storage temperature",
"symbol": "Tstg",
"kind": "absolute_maximum",
"unit": "°C",
"min": -65,
"typ": null,
"max": 150,
"conditions": "",
"source_page": 9,
"source": "datasheet"
},
{
"name": "Supply Voltage (VDD_n)",
"symbol": "VDD_n",
"kind": "recommended_operating",
"unit": "V",
"min": 1.71,
"typ": 1.8,
"max": 1.89,
"conditions": "",
"source_page": 9,
"source": "datasheet"
},
{
"name": "LVCMOS Supply Voltage (VDDIO = 1.8 V)",
"symbol": "VDDIO",
"kind": "recommended_operating",
"unit": "V",
"min": 1.71,
"typ": 1.8,
"max": 1.89,
"conditions": "VDDIO = 1.8 V",
"source_page": 9,
"source": "datasheet"
},
{
"name": "LVCMOS Supply Voltage (VDDIO = 3.3 V)",
"symbol": "VDDIO",
"kind": "recommended_operating",
"unit": "V",
"min": 3,
"typ": 3.3,
"max": 3.6,
"conditions": "VDDIO = 3.3 V",
"source_page": 9,
"source": "datasheet"
},
{
"name": "Supply Noise VDD_n (1.8 V)",
"symbol": "",
"kind": "recommended_operating",
"unit": "mVp-p",
"min": null,
"typ": null,
"max": 25,
"conditions": "VDD_n (1.8 V); printed value placed in max column, verify",
"source_page": 9,
"source": "datasheet"
},
{
"name": "Supply Noise VDDIO (1.8 V)",
"symbol": "",
"kind": "recommended_operating",
"unit": "mVp-p",
"min": null,
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