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DS90UB901QSQE

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Texas Instruments Serializers, Deserializers, WQFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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DS90UB901QSQE

Texas Instruments · Serializers, Deserializers · WQFN-32(5x5)

DS90UB901QSQE from Texas Instruments, in a WQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 HSYNC input Horizontal SYNC input, LVCMOS with pull down, powered from VDDIO.
2 VSYNC input Vertical SYNC input, LVCMOS with pull down, powered from VDDIO.
3 PCLK input Pixel clock input, LVCMOS with pull down; strobe edge set by TRFB control register.
4 SCL bidirectional Open-drain clock line for the I2C-compatible bidirectional control bus; requires an external pull-up resistor to VDDIO.
5 SDA bidirectional Open-drain data line for the I2C-compatible bidirectional control bus; requires an external pull-up resistor to VDDIO.
6 ID[x] input Analog device ID address select input; resistor to ground and 10 kΩ pull-up to the 1.8V rail (see Table 3).
7 RES input Reserved LVCMOS input with pull down; this pin MUST be tied LOW.
8 MODE input I2C mode select, LVCMOS with pull down: L = master mode (default), H = slave mode that accepts SCL clock input.
9 PDB input Power-down input, LVCMOS with pull down: H = serializer on, L = power down (PLL shut down, IDD minimized, control registers reset to defaults).
10 VDDPLL power_in Analog PLL power, 1.8V ±5%.
11 VDDT power_in Analog Tx power, 1.8V ±5%.
12 DOUT- bidirectional Inverting CML differential output and bidirectional control channel input; interconnect must be AC coupled with a 100 nF capacitor.
13 DOUT+ bidirectional Non-inverting CML differential output and bidirectional control channel input; interconnect must be AC coupled with a 100 nF capacitor.
14 VDDCML power_in CML and bidirectional channel driver analog power, 1.8V ±5%.
15 GPIO[0] bidirectional LVCMOS general-purpose pin configurable as input or output, used to control and respond to various commands.
16 GPIO[1] bidirectional LVCMOS general-purpose pin configurable as input or output, used to control and respond to various commands.
17 DIN[0]/GPIO[2] bidirectional Parallel data input 0 (LVCMOS with pull down) that can be configured as GPIO[2] input or output.
18 DIN[1]/GPIO[3] bidirectional Parallel data input 1 (LVCMOS with pull down) that can be configured as GPIO[3] input or output.
19 DIN[2]/GPIO[4] bidirectional Parallel data input 2 (LVCMOS with pull down) that can be configured as GPIO[4] input or output.
20 DIN[3]/GPIO[5] bidirectional Parallel data input 3 (LVCMOS with pull down) that can be configured as GPIO[5] input or output.
21 DIN[4] input Parallel data input 4, LVCMOS with pull down.
22 DIN[5] input Parallel data input 5, LVCMOS with pull down.
23 DIN[6] input Parallel data input 6, LVCMOS with pull down.
24 DIN[7] input Parallel data input 7, LVCMOS with pull down.
25 VDDIO power_in Digital I/O stage power for single-ended inputs and SDA/SCL; connect to 1.8V ±5% or 3.3V ±10%.
26 DIN[8] input Parallel data input 8, LVCMOS with pull down.
27 DIN[9] input Parallel data input 9, LVCMOS with pull down.
28 VDDD power_in Digital power, 1.8V ±5%.
29 DIN[10] input Parallel data input 10, LVCMOS with pull down.
30 DIN[11] input Parallel data input 11, LVCMOS with pull down.
31 DIN[12] input Parallel data input 12, LVCMOS with pull down.
32 DIN[13] input Parallel data input 13, LVCMOS with pull down.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WQFN-32(5x5)
Category Interface
Pins 33

CAD (KiCad official)

  • Symbol: DS90UB901QSQE
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: WQFN-32(5x5) (KiCad packages3D, STEP)
  • 3D model files: ds90ub901qsqe-etched.step / ds90ub901qsqe-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ds90ub901qsqe.step / ds90ub901qsqe.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (52 pp, sha256 4d9fc0b46baeeccf, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF