component
DS90LV804TSQX
Public Made by Adomby adom
Texas Instruments LVDS ICs, WQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"type": "component",
"slug": "ds90lv804tsqx",
"title": "DS90LV804TSQX",
"brief": "Texas Instruments LVDS ICs, WQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
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"ds90lv804tsqx",
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],
"component": {
"mpn": "DS90LV804TSQX",
"manufacturer": "Texas Instruments",
"package": "WQFN-32-EP(5x5)",
"pin_count": 33,
"category": "Interface",
"subcategory": "LVDS ICs",
"datasheet": "https://www.ti.com/cn/lit/gpn/ds90lv804",
"parts": {
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"footprint": "ds90lv804tsqx.kicad_mod",
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"model_3d_step": "ds90lv804tsqx-etched.step",
"model_3d_step_plain": "ds90lv804tsqx.step",
"lbr": "ds90lv804tsqx.lbr"
},
"distributor_links": {
"lcsc": "C2870894",
"digikey": "DS90LV804TSQX-ND",
"mouser": "926-DS90LV804TSQX"
},
"distributor_check": {
"checked_at": "2026-10-10T21:32:05Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "DS90LV804TSQX-ND",
"status": "found",
"lifecycle": "Obsolete"
},
"mouser": {
"pn": "926-DS90LV804TSQX",
"status": "found",
"lifecycle": "Obsolete"
}
},
"pins": [
{
"number": "1",
"name": "GND",
"type": "power_in",
"description": "Ground reference for LVDS and CMOS circuitry; tie to ground for proper biasing, with the DAP as the primary ground connection."
},
{
"number": "2",
"name": "GND",
"type": "power_in",
"description": "Ground reference for LVDS and CMOS circuitry; tie to ground for proper biasing, with the DAP as the primary ground connection."
},
{
"number": "3",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin; VDD = 3.3V ±5% (recommended supply range 3.15V to 3.45V)."
},
{
"number": "4",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin; VDD = 3.3V ±5% (recommended supply range 3.15V to 3.45V)."
},
{
"number": "5",
"name": "GND",
"type": "power_in",
"description": "Ground reference for LVDS and CMOS circuitry; tie to ground for proper biasing, with the DAP as the primary ground connection."
},
{
"number": "6",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin; VDD = 3.3V ±5% (recommended supply range 3.15V to 3.45V)."
},
{
"number": "7",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin; VDD = 3.3V ±5% (recommended supply range 3.15V to 3.45V)."
},
{
"number": "8",
"name": "EN",
"type": "input",
"description": "LVTTL/LVCMOS enable: HIGH enables the driver, LOW places the LVDS outputs in TRI-STATE; VIH min 2.0V and VIL max 0.8V."
},
{
"number": "9",
"name": "IN0+",
"type": "input",
"description": "Channel 0 non-inverting LVDS differential input, internally terminated with 100 Ω; accepts LVDS, CML and LVPECL with VID 100 mV to 2400 mV."
},
{
"number": "10",
"name": "IN0-",
"type": "input",
"description": "Channel 0 inverting LVDS differential input, internally terminated with 100 Ω across the pair; accepts LVDS, CML and LVPECL with VID 100 mV to 2400 mV."
},
{
"number": "11",
"name": "IN1+",
"type": "input",
"description": "Channel 1 non-inverting LVDS differential input, internally terminated with 100 Ω; accepts LVDS, CML and LVPECL with VID 100 mV to 2400 mV."
},
{
"number": "12",
"name": "IN1-",
"type": "input",
"description": "Channel 1 inverting LVDS differential input, internally terminated with 100 Ω across the pair; accepts LVDS, CML and LVPECL with VID 100 mV to 2400 mV."
},
{
"number": "13",
"name": "IN2+",
"type": "input",
"description": "Channel 2 non-inverting LVDS differential input, internally terminated with 100 Ω; accepts LVDS, CML and LVPECL with VID 100 mV to 2400 mV."
},
{
"number": "14",
"name": "IN2-",
"type": "input",
"description": "Channel 2 inverting LVDS differential input, internally terminated with 100 Ω across the pair; accepts LVDS, CML and LVPECL with VID 100 mV to 2400 mV."
},
{
"number": "15",
"name": "IN3+",
"type": "input",
"description": "Channel 3 non-inverting LVDS differential input, internally terminated with 100 Ω; accepts LVDS, CML and LVPECL with VID 100 mV to 2400 mV."
},
{
"number": "16",
"name": "IN3-",
"type": "input",
"description": "Channel 3 inverting LVDS differential input, internally terminated with 100 Ω across the pair; accepts LVDS, CML and LVPECL with VID 100 mV to 2400 mV."
},
{
"number": "17",
"name": "GND",
"type": "power_in",
"description": "Ground reference for LVDS and CMOS circuitry; tie to ground for proper biasing, with the DAP as the primary ground connection."
},
{
"number": "18",
"name": "GND",
"type": "power_in",
"description": "Ground reference for LVDS and CMOS circuitry; tie to ground for proper biasing, with the DAP as the primary ground connection."
},
{
"number": "19",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin; VDD = 3.3V ±5% (recommended supply range 3.15V to 3.45V)."
},
{
"number": "20",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin; VDD = 3.3V ±5% (recommended supply range 3.15V to 3.45V)."
},
{
"number": "21",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin; VDD = 3.3V ±5% (recommended supply range 3.15V to 3.45V)."
},
{
"number": "22",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin; VDD = 3.3V ±5% (recommended supply range 3.15V to 3.45V)."
},
{
"number": "23",
"name": "N/C",
"type": "unconnected",
"description": "No connect; not connected internally."
},
{
"number": "24",
"name": "N/C",
"type": "unconnected",
"description": "No connect; not connected internally."
},
{
"number": "25",
"name": "OUT3-",
"type": "output",
"description": "Channel 3 inverting LVDS differential output for point-to-point backplane or cable use only (not multidrop/BLVDS); VOD 250 mV to 600 mV into 100 Ω."
},
{
"number": "26",
"name": "OUT3+",
"type": "output",
"description": "Channel 3 non-inverting LVDS differential output for point-to-point backplane or cable use only (not multidrop/BLVDS); VOD 250 mV to 600 mV into 100 Ω."
},
{
"number": "27",
"name": "OUT2-",
"type": "output",
"description": "Channel 2 inverting LVDS differential output for point-to-point backplane or cable use only (not multidrop/BLVDS); VOD 250 mV to 600 mV into 100 Ω."
},
{
"number": "28",
"name": "OUT2+",
"type": "output",
"description": "Channel 2 non-inverting LVDS differential output for point-to-point backplane or cable use only (not multidrop/BLVDS); VOD 250 mV to 600 mV into 100 Ω."
},
{
"number": "29",
"name": "OUT1-",
"type": "output",
"description": "Channel 1 inverting LVDS differential output for point-to-point backplane or cable use only (not multidrop/BLVDS); VOD 250 mV to 600 mV into 100 Ω."
},
{
"number": "30",
"name": "OUT1+",
"type": "output",
"description": "Channel 1 non-inverting LVDS differential output for point-to-point backplane or cable use only (not multidrop/BLVDS); VOD 250 mV to 600 mV into 100 Ω."
},
{
"number": "31",
"name": "OUT0-",
"type": "output",
"description": "Channel 0 inverting LVDS differential output for point-to-point backplane or cable use only (not multidrop/BLVDS); VOD 250 mV to 600 mV into 100 Ω."
},
{
"number": "32",
"name": "OUT0+",
"type": "output",
"description": "Channel 0 non-inverting LVDS differential output for point-to-point backplane or cable use only (not multidrop/BLVDS); VOD 250 mV to 600 mV into 100 Ω."
},
{
"number": "33",
"name": "GND",
"type": "power_in",
"description": "Exposed die attach pad on the WQFN underside, the primary ground connection; solder to the board ground plane with at least 4 vias for AC and thermal performance."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
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"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The datasheet gives no printed number for the exposed pad in the pin table or the top-view figure. P; Pin numbers 1-32 come from the page 7 pin description table. The top-view pinout figure on page 2 ha; Pin 33 (DAP) is described as the primary GND connection in the page 7 footnote and the thermal-pad n",
"1/33 pins cited to the wrong page (name found elsewhere): ['33:DAP (GND)@p7']"
],
"pages_sent": 16,
"cost_usd": 0.0861,
"at": "2026-10-10T21:31:48"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/ds90lv804",
"pages": 16,
"sha256": "b77cddb0306e6ff1",
"source_tier": "lcsc"
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"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
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"described": 33,
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"refuses_to_fabricate": true
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"sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",
"checked": "2026-10-10",
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"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "WQFN-32-EP(5x5)",
"Category": "Interface",
"Pins": "33"
}
},
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"email": "[email protected]"
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