DS90LV049TMTX

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  "title": "DS90LV049TMTX",
  "brief": "Texas Instruments LVDS ICs, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
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    "mpn": "DS90LV049TMTX",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "Interface",
    "subcategory": "LVDS ICs",
    "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2303011500_Texas-Instruments-DS90LV049TMTX-NOPB_C2671003.pdf",
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    "pins": [
      {
        "number": "1",
        "name": "RIN1-",
        "type": "input",
        "description": "Inverting LVDS receiver 1 input. Differential input pair (with RIN1+) accepting LVDS signals with common-mode range 0.05 V to 3 V; internal fail-safe biasing places the receiver output in a known HIGH state when inputs are floating."
      },
      {
        "number": "2",
        "name": "RIN1+",
        "type": "input",
        "description": "Non-inverting LVDS receiver 1 input. Differential input pair (with RIN1-) accepting LVDS signals per TIA/EIA-644-A."
      },
      {
        "number": "3",
        "name": "RIN2+",
        "type": "input",
        "description": "Non-inverting LVDS receiver 2 input. Differential input pair (with RIN2-) accepting LVDS signals per TIA/EIA-644-A."
      },
      {
        "number": "4",
        "name": "RIN2-",
        "type": "input",
        "description": "Inverting LVDS receiver 2 input. Differential input pair (with RIN2+) accepting LVDS signals; internal fail-safe biasing on floating inputs."
      },
      {
        "number": "5",
        "name": "DOUT2-",
        "type": "output",
        "description": "Inverting LVDS driver 2 output. Differential output pair (with DOUT2+) driving |VOD| = 250-450 mV into a 100 Ω line load; TRI-STATE when disabled."
      },
      {
        "number": "6",
        "name": "DOUT2+",
        "type": "output",
        "description": "Non-inverting LVDS driver 2 output. Differential output pair (with DOUT2-) driving a 100 Ω terminated LVDS line per TIA/EIA-644-A."
      },
      {
        "number": "7",
        "name": "DOUT1+",
        "type": "output",
        "description": "Non-inverting LVDS driver 1 output. Differential output pair (with DOUT1-) driving a 100 Ω terminated LVDS line."
      },
      {
        "number": "8",
        "name": "DOUT1-",
        "type": "output",
        "description": "Inverting LVDS driver 1 output. Differential output pair (with DOUT1+); TRI-STATE when disabled via EN/EN pins."
      },
      {
        "number": "9",
        "name": "EN_N",
        "type": "input",
        "description": "Active-low enable input (EN-bar), LVCMOS levels. ANDed with EN to control TRI-STATE of all four channels (both drivers and receivers); outputs are enabled only when EN = H and EN_N = L or Open. Input high 2.0 V min, input low 0.8 V max."
      },
      {
        "number": "10",
        "name": "DIN1",
        "type": "input",
        "description": "LVCMOS driver 1 input. Drives LVDS driver 1 outputs (DOUT1+/-). VIH ≥ 2.0 V, VIL ≤ 0.8 V; input clamp voltage -0.6 V typ at ICL = -18 mA."
      },
      {
        "number": "11",
        "name": "DIN2",
        "type": "input",
        "description": "LVCMOS driver 2 input. Drives LVDS driver 2 outputs (DOUT2+/-). LVCMOS input levels: VIH ≥ 2.0 V, VIL ≤ 0.8 V."
      },
      {
        "number": "12",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply. +3.3 V ±10% (3.0 V min, 3.6 V max). Typical supply current IDD = 21 mA (35 mA max) enabled; 15 mA typ (25 mA max) in TRI-STATE."
      },
      {
        "number": "13",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference (0 V) for all supply and signal levels."
      },
      {
        "number": "14",
        "name": "ROUT2",
        "type": "output",
        "description": "LVCMOS receiver 2 output. 3 V CMOS level output; VOH ≥ 2.7 V at IOH = -0.4 mA, VOL ≤ 0.25 V at IOL = 2 mA. TRI-STATE when disabled."
      },
      {
        "number": "15",
        "name": "ROUT1",
        "type": "output",
        "description": "LVCMOS receiver 1 output. 3 V CMOS level output; VOH ≥ 2.7 V, VOL ≤ 0.25 V. TRI-STATE when disabled via EN/EN_N."
      },
      {
        "number": "16",
        "name": "EN",
        "type": "input",
        "description": "Active-high enable input, LVCMOS levels. ANDed with EN_N to control TRI-STATE of all four channels; outputs enabled only when EN = H and EN_N = L or Open (see Truth Table). VIH ≥ 2.0 V, VIL ≤ 0.8 V."
      }
    ],
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        "pages": 22,
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        "source_tier": "lcsc"
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      "pins": {
        "total": 16,
        "described": 16,
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  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "TSSOP-16",
      "Category": "Interface",
      "Pins": "16"
    }
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  "updated_at": "2026-09-24T20:09:13.963Z"
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