component

DS90LV049TMT

Public Made by Adom

by adom

Texas Instruments LVDS ICs, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterfaceds90lv049tmtfactory-2.0.0extractor-text

Verified DS90LV049TMT

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier mfr, 16 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: DS90LV049TMT · TSSOP-16 · 16 pins
  • ✓copper: 16 copper pads, none touching another net
  • ✓datasheet: all 16 pin names found in the 22-page datasheet
  • ✓distributor: lcsc C2872489, digikey DS90LV049TMT-ND, mouser 926-DS90LV049TMT
  • ✓family: TSSOP-16_4.4x5mm_P0.65mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-fl17c6d6/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 16 pins = 16 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 16 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ds90lv049tmt.kicad_sym✓ ds90lv049tmt.kicad_mod✓ ds90lv049tmt.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray
viewers ds90lv049tmt: viewers · Ray
ds90lv049tmt-etched.glb Publish 0.1.0 · Ray
ds90lv049tmt-etched.step ds90lv049tmt: factory component page (tier=mfr) · Ray
ds90lv049tmt-hero.glb ds90lv049tmt: hero GLB from the etched model (keeps the MPN mark) · Ray
ds90lv049tmt-hero.overlay.json Publish 0.1.0 · Ray
ds90lv049tmt.glb Publish 0.1.0 · Ray
ds90lv049tmt.kicad_mod Publish 0.1.0 · Ray
ds90lv049tmt.kicad_sym Publish 0.1.0 · Ray
ds90lv049tmt.lbr Publish 0.1.0 · Ray
ds90lv049tmt.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json Set visibility: public · Ray
README.md Publish 0.1.0 · Ray
verification.json Verified: Published by the parts factory: tier mfr, 16 pins · Ray

DS90LV049TMT

Texas Instruments · LVDS ICs · TSSOP-16

DS90LV049TMT from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RIN1- input Inverting receiver input pin with LVDS levels and an internal pull-down current source present.
2 RIN1+ input Non-inverting receiver input pin with LVDS levels and an internal pull-up current source present.
3 RIN2+ input Non-inverting receiver input pin with LVDS levels and an internal pull-up current source present.
4 RIN2- input Inverting receiver input pin with LVDS levels and an internal pull-down current source present.
5 DOUT2- output Inverting driver output pin with LVDS levels.
6 DOUT2+ output Non-inverting driver output pin with LVDS levels.
7 DOUT1+ output Non-inverting driver output pin with LVDS levels.
8 DOUT1- output Inverting driver output pin with LVDS levels.
9 EN input Enable pin; EN and EN are ANDed together to control the TRI-STATE outputs, with a pull-down current source present.
10 DIN1 input Driver input pin with LVCMOS levels and a pull-down current source present.
11 DIN2 input Driver input pin with LVCMOS levels and a pull-down current source present.
12 VDD power_in Power supply pin; recommended supply voltage is 3.0 V to 3.6 V (3.3 V typical).
13 GND power_in Ground pin.
14 ROUT2 output Receiver output pin with LVCMOS levels.
15 ROUT1 output Receiver output pin with LVCMOS levels.
16 EN input Inverted enable pin; EN and EN are ANDed together to control the TRI-STATE outputs, with a pull-down current source present.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Interface
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDD 3 3.3 3.6 V 3
Operating Free Air Temperature TA -40 25 85 °C 3
Supply Voltage VDD -0.3 4 V 3
LVCMOS Input Voltage (DIN) DIN -0.3 V Max is VDD + 0.3 V as printed 3
LVDS Input Voltage (RIN+, RIN-) RIN+, RIN- -0.3 3.9 V 3
Enable Input Voltage (EN, EN) EN, EN -0.3 V Max is VDD + 0.3 V as printed 3
LVCMOS Output Voltage (ROUT) ROUT -0.3 V Max is VDD + 0.3 V as printed 3
LVDS Output Voltage (DOUT+, DOUT-) DOUT+, DOUT- -0.3 3.9 V 3
LVCMOS Output Short Circuit Current (ROUT) 100 mA 3
LVDS Output Short Circuit Current (DOUT+, DOUT-) 24 mA 3
Storage Temperature Range -65 150 °C 3
Lead Temperature Range Soldering 260 °C 4 sec. 3
Maximum Junction Temperature 150 °C 3
Maximum Package Power Dissipation 866 mW @ +25°C, PW0016A Package 3
Derate PW0016A Package 6.9 mW/°C above +25°C 3
ESD Rating HBM 7 kV HBM, 1.5 kΩ, 100 pF; ≥ 7 kV as printed 3
ESD Rating MM 250 V MM, 0 Ω, 200 pF; ≥ 250 V as printed 3
Differential Output Voltage /VOD/ 250 350 450 mV RL = 100 Ω (Figure 1) 4
Change in Magnitude of VOD for Complementary Output States ΔVOD 1 35 mV RL = 100 Ω (Figure 1) 4
Offset Voltage VOS 1.125 1.23 1.375 V 4
Change in Magnitude of VOS for Complementary Output States ΔVOS 1 25 mV 4
Output Short Circuit Current IOS -5.8 -9 mA ENABLED, DIN = VDD, DOUT+ = 0 V or DIN = GND, DOUT- = 0 V; magnitude only 4
Differential Output Short Circuit Current IOSD -5.8 -9 mA ENABLED, VOD = 0 V 4
Power-off Leakage IOFF -20 1 20 μA VOUT = 0 V or 3.6 V, VDD = 0 V or Open 4
Output TRI-STATE Current IOZ -10 1 10 μA EN = 0 V and EN = VDD, VOUT = 0 V or VDD 4
Differential Input High Threshold VTH -15 35 mV VCM = 1.2 V, 0.05 V, 2.35 V 4
Differential Input Low Threshold VTL -100 -15 mV VCM = 1.2 V, 0.05 V, 2.35 V 4
Common-Mode Voltage Range VCMR 0.05 3 V VID = 100 mV, VDD = 3.3 V 4
Input Current RIN+ IIN -12 4 12 μA VDD = 3.6 V, VIN = 0 V or 2.8 V 4
Input Current RIN- IIN -10 1 10 μA VDD = 0 V, VIN = 0 V or 2.8 V or 3.6 V 4
Output High Voltage VOH 2.7 3.3 V IOH = -0.4 mA, VID = 200 mV 4
Output Low Voltage VOL 0.05 0.25 V IOL = 2 mA, VID = 200 mV, ROUT 4
Output TRI-STATE Current (receiver) IOZ -10 1 10 μA Disabled, VOUT = 0 V or VDD 4
Power Supply Current IDD 21 35 mA EN = 3.3 V 4
TRI-State Supply Current IDDZ 15 25 mA EN = 0 V 4
Input High Voltage VIH 2 V Driver inputs, ENABLE pins; max is VDD as printed 3
Input Low Voltage VIL 0.8 V DIN 3
Input High Current IIH -10 1 10 μA VIN = VDD, EN 3
Input Low Current IIL -10 -0.1 10 μA VIN = GND, EN 3
Input Clamp Voltage VCL -1.5 -0.6 V ICL = -18 mA 3
Differential Propagation Delay High to Low tPHLD 0.7 2 ns RL = 100 Ω (Figure 2 and Figure 3) 5
Differential Propagation Delay Low to High tPLHD 0.7 2 ns RL = 100 Ω (Figure 2 and Figure 3) 5
Differential Pulse Skew tSKD1 0 0.05 0.4 ns /tPHLD − tPLHD/, RL = 100 Ω 5
Differential Channel-to-Channel Skew tSKD2 0 0.05 0.5 ns Figure 2 and Figure 3 5
Differential Part-to-Part Skew tSKD3 0 1 ns 5
Driver Rise Time tTLH 0.2 0.4 1 ns 5
Driver Fall Time tTHL 0.2 0.4 1 ns 5
Driver Disable Time High to Z tPHZ 1.5 3 ns RL = 100 Ω (Figure 4 and Figure 5) 5
Driver Disable Time Low to Z tPLZ 1.5 3 ns RL = 100 Ω (Figure 4 and Figure 5) 5
Driver Enable Time Z to High tPZH 1 3 6 ns Figure 4 and Figure 5 5
Driver Enable Time Z to Low tPZL 1 3 6 ns Figure 4 and Figure 5 5
Maximum Operating Frequency (driver) fMAX 200 250 MHz Output criteria duty cycle 45%/55%, VOD > 250 mV 5
Receiver Propagation Delay High to Low tPHL 0.5 2 3.5 ns Figure 6 and Figure 7 5
Receiver Propagation Delay Low to High tPLH 0.5 2 3.5 ns Figure 6 and Figure 7 5
Receiver Pulse Skew tSK1 0 0.05 0.4 ns /tPHL − tPLH/ 5
Receiver Channel-to-Channel Skew tSK2 0 0.05 0.5 ns Figure 6 and Figure 7 5
Receiver Part-to-Part Skew tSK3 0 1 ns 5
Receiver Rise Time tTLH 0.3 0.9 1.4 ns 5
Receiver Fall Time tTHL 0.3 0.75 1.4 ns 5
Receiver Disable Time High to Z tPHZ 3 5.6 8 ns Figure 8 and Figure 9 5
Receiver Disable Time Low to Z tPLZ 3 5.4 8 ns Figure 8 and Figure 9 5
Receiver Enable Time Z to High tPZH 2.5 4.6 7 ns Figure 8 and Figure 9 5
Receiver Enable Time Z to Low tPZL 2.5 4.6 7 ns Figure 8 and Figure 9 5
Maximum Operating Frequency (receiver) fMAX 200 250 MHz VID = 200 mV, VCM = 1.2 V; VOH > 2.7 V, VOL < 0.25 V 5

CAD (KiCad official)

  • Symbol: DS90LV049TMT
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: ds90lv049tmt-etched.step / ds90lv049tmt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ds90lv049tmt.step / ds90lv049tmt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (22 pp, sha256 6e8000ad7e1f995b, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF