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Initial commit: component/ds90lv048atmx

Ray ·68223d37e5 ·
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README.mdadded+52
@@ -0,0 +1,52 @@+# DS90LV048ATMX++**Texas Instruments** · LVDS ICs · SOIC-16++DS90LV048ATMX from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | RIN1- | input | Inverting LVDS differential receiver input for channel 1; receiver input voltage range GND to 3 V, differential threshold region −100 mV to 0 mV, common-mode range 0.1 V to 2.3 V. |+| 2 | RIN1+ | input | Noninverting LVDS differential receiver input for channel 1; receiver input voltage range GND to 3 V, differential threshold region −100 mV to 0 mV, common-mode range 0.1 V to 2.3 V. |+| 3 | RIN2+ | input | Noninverting LVDS differential receiver input for channel 2; receiver input voltage range GND to 3 V, differential threshold region −100 mV to 0 mV, common-mode range 0.1 V to 2.3 V. |+| 4 | RIN2- | input | Inverting LVDS differential receiver input for channel 2; receiver input voltage range GND to 3 V, differential threshold region −100 mV to 0 mV, common-mode range 0.1 V to 2.3 V. |+| 5 | RIN3- | input | Inverting LVDS differential receiver input for channel 3; receiver input voltage range GND to 3 V, differential threshold region −100 mV to 0 mV, common-mode range 0.1 V to 2.3 V. |+| 6 | RIN3+ | input | Noninverting LVDS differential receiver input for channel 3; receiver input voltage range GND to 3 V, differential threshold region −100 mV to 0 mV, common-mode range 0.1 V to 2.3 V. |+| 7 | RIN4+ | input | Noninverting LVDS differential receiver input for channel 4; receiver input voltage range GND to 3 V, differential threshold region −100 mV to 0 mV, common-mode range 0.1 V to 2.3 V. |+| 8 | RIN4- | input | Inverting LVDS differential receiver input for channel 4; receiver input voltage range GND to 3 V, differential threshold region −100 mV to 0 mV, common-mode range 0.1 V to 2.3 V. |+| 9 | EN* | input | Active-low receiver enable, ANDed with EN; when high the receiver is disabled and all outputs are TRI-STATE; receiver is enabled when this pin is low or open and EN is high; VIH min 2 V, VIL max 0.8 V. |+| 10 | ROUT4 | tri_state | 3-V CMOS TRI-STATE output for channel 4; VOH min 2.7 V at IOH = −0.4 mA, VOL max 0.25 V at IOL = 2 mA; output is high-impedance when disabled. |+| 11 | ROUT3 | tri_state | 3-V CMOS TRI-STATE output for channel 3; VOH min 2.7 V at IOH = −0.4 mA, VOL max 0.25 V at IOL = 2 mA; output is high-impedance when disabled. |+| 12 | GND | power_in | Ground reference pin. |+| 13 | VCC | power_in | Power supply pin; +3.3 V ±0.3 V (3.0 V min, 3.6 V max); bypass with 0.1-µF and 0.001-µF ceramic capacitors in parallel at pin. |+| 14 | ROUT2 | tri_state | 3-V CMOS TRI-STATE output for channel 2; VOH min 2.7 V at IOH = −0.4 mA, VOL max 0.25 V at IOL = 2 mA; output is high-impedance when disabled. |+| 15 | ROUT1 | tri_state | 3-V CMOS TRI-STATE output for channel 1; VOH min 2.7 V at IOH = −0.4 mA, VOL max 0.25 V at IOL = 2 mA; output is high-impedance when disabled. |+| 16 | EN | input | Active-high receiver enable, ANDed with EN*; when low the receiver is disabled and all outputs are TRI-STATE; receiver is enabled when this pin is high and EN* is low or open; VIH min 2 V, VIL max 0.8 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16 |+| Category | Interface |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `DS90LV048ATMX`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `ds90lv048atmx-etched.step` / `ds90lv048atmx-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ds90lv048atmx.step` / `ds90lv048atmx.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ds90lv048a) (25 pp, sha256 `65b8bc4088696d56`, retrieved 2026-09-22, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ds90lv048atmx-datasheet.pdf)
page.jsonadded+191
@@ -0,0 +1,191 @@+{+  "slug": "ds90lv048atmx",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments LVDS ICs, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "interface",+    "ds90lv048atmx",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "ds90lv048atmx.kicad_sym",+    "ds90lv048atmx.kicad_mod",+    "ds90lv048atmx.glb",+    "ds90lv048atmx.step",+    "ds90lv048atmx.lbr",+    "docs/hero.png",+    "docs/ds90lv048atmx-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "DS90LV048ATMX",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-16",+    "pin_count": 16,+    "category": "Interface",+    "subcategory": "LVDS ICs",+    "datasheet": "https://www.ti.com/cn/lit/gpn/ds90lv048a",+    "parts": {+      "symbol": "ds90lv048atmx.kicad_sym",+      "footprint": "ds90lv048atmx.kicad_mod",+      "model_3d": "ds90lv048atmx-etched.glb",+      "model_3d_plain": "ds90lv048atmx.glb",+      "model_3d_step": "ds90lv048atmx-etched.step",+      "model_3d_step_plain": "ds90lv048atmx.step",+      "lbr": "ds90lv048atmx.lbr"+    },+    "distributor_links": {+      "lcsc": "C2671025"+    },+    "pins": [+      {+        "number": "1",+        "name": "RIN1-",+        "type": "input",+        "description": "Inverting LVDS differential receiver input for channel 1; receiver input voltage range GND to 3 V, differential threshold region −100 mV to 0 mV, common-mode range 0.1 V to 2.3 V."+      },+      {+        "number": "2",+        "name": "RIN1+",+        "type": "input",+        "description": "Noninverting LVDS differential receiver input for channel 1; receiver input voltage range GND to 3 V, differential threshold region −100 mV to 0 mV, common-mode range 0.1 V to 2.3 V."+      },+      {+        "number": "3",+        "name": "RIN2+",+        "type": "input",+        "description": "Noninverting LVDS differential receiver input for channel 2; receiver input voltage range GND to 3 V, differential threshold region −100 mV to 0 mV, common-mode range 0.1 V to 2.3 V."+      },+      {+        "number": "4",+        "name": "RIN2-",+        "type": "input",+        "description": "Inverting LVDS differential receiver input for channel 2; receiver input voltage range GND to 3 V, differential threshold region −100 mV to 0 mV, common-mode range 0.1 V to 2.3 V."+      },+      {+        "number": "5",+        "name": "RIN3-",+        "type": "input",+        "description": "Inverting LVDS differential receiver input for channel 3; receiver input voltage range GND to 3 V, differential threshold region −100 mV to 0 mV, common-mode range 0.1 V to 2.3 V."+      },+      {+        "number": "6",+        "name": "RIN3+",+        "type": "input",+        "description": "Noninverting LVDS differential receiver input for channel 3; receiver input voltage range GND to 3 V, differential threshold region −100 mV to 0 mV, common-mode range 0.1 V to 2.3 V."+      },+      {+        "number": "7",+        "name": "RIN4+",+        "type": "input",+        "description": "Noninverting LVDS differential receiver input for channel 4; receiver input voltage range GND to 3 V, differential threshold region −100 mV to 0 mV, common-mode range 0.1 V to 2.3 V."+      },+      {+        "number": "8",+        "name": "RIN4-",+        "type": "input",+        "description": "Inverting LVDS differential receiver input for channel 4; receiver input voltage range GND to 3 V, differential threshold region −100 mV to 0 mV, common-mode range 0.1 V to 2.3 V."+      },+      {+        "number": "9",+        "name": "EN*",+        "type": "input",+        "description": "Active-low receiver enable, ANDed with EN; when high the receiver is disabled and all outputs are TRI-STATE; receiver is enabled when this pin is low or open and EN is high; VIH min 2 V, VIL max 0.8 V."+      },+      {+        "number": "10",+        "name": "ROUT4",+        "type": "tri_state",+        "description": "3-V CMOS TRI-STATE output for channel 4; VOH min 2.7 V at IOH = −0.4 mA, VOL max 0.25 V at IOL = 2 mA; output is high-impedance when disabled."+      },+      {+        "number": "11",+        "name": "ROUT3",+        "type": "tri_state",+        "description": "3-V CMOS TRI-STATE output for channel 3; VOH min 2.7 V at IOH = −0.4 mA, VOL max 0.25 V at IOL = 2 mA; output is high-impedance when disabled."+      },+      {+        "number": "12",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference pin."+      },+      {+        "number": "13",+        "name": "VCC",+        "type": "power_in",+        "description": "Power supply pin; +3.3 V ±0.3 V (3.0 V min, 3.6 V max); bypass with 0.1-µF and 0.001-µF ceramic capacitors in parallel at pin."+      },+      {+        "number": "14",+        "name": "ROUT2",+        "type": "tri_state",+        "description": "3-V CMOS TRI-STATE output for channel 2; VOH min 2.7 V at IOH = −0.4 mA, VOL max 0.25 V at IOL = 2 mA; output is high-impedance when disabled."+      },+      {+        "number": "15",+        "name": "ROUT1",+        "type": "tri_state",+        "description": "3-V CMOS TRI-STATE output for channel 1; VOH min 2.7 V at IOH = −0.4 mA, VOL max 0.25 V at IOL = 2 mA; output is high-impedance when disabled."+      },+      {+        "number": "16",+        "name": "EN",+        "type": "input",+        "description": "Active-high receiver enable, ANDed with EN*; when low the receiver is disabled and all outputs are TRI-STATE; receiver is enabled when this pin is high and EN* is low or open; VIH min 2 V, VIL max 0.8 V."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-4-6",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "8/16 pins cited to the wrong page (name found elsewhere): ['2:RIN1+@p3', '3:RIN2+@p3', '4:RIN2-@p3', '6:RIN3+@p3']"+        ],+        "pages_sent": 25,+        "cost_usd": 0.2981,+        "at": "2026-09-22T00:15:45"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/ds90lv048a",+        "pages": 25,+        "sha256": "65b8bc4088696d56",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 16,+        "described": 16,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file