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Contents

README

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DS90CP02SP

Texas Instruments · Signal Switches, Multiplexers, Decoders · WQFN-28-EP(5x5)

DS90CP02SP from Texas Instruments, in a WQFN-28-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference to LVDS and CMOS circuitry.
2 GND power_in Ground reference to LVDS and CMOS circuitry.
3 GND power_in Ground reference to LVDS and CMOS circuitry.
4 GND power_in Ground reference to LVDS and CMOS circuitry.
5 SEL1 input LVTTL select control input that, with SEL0, sets which input each output is connected to.
6 SEL0 input LVTTL select control input that, with SEL1, sets which input each output is connected to.
7 EN0 input LVTTL output enable input (active low) for channel 0; EN0 and EN1 high together put both channels in power down.
8 N/C unconnected Not connected.
9 IN0+ input Differential input, LVDS, Bus LVDS, CML, or LVPECL compatible.
10 IN0- input Differential input, LVDS, Bus LVDS, CML, or LVPECL compatible.
11 VDD power_in Supply pin (labelled VDDA in the connection diagram), VDD = 3.3V ±0.3V, with at least 4 low ESR 0.01 µF bypass capacitors from VDD to the GND plane.
12 IN1+ input Differential input, LVDS, Bus LVDS, CML, or LVPECL compatible.
13 IN1- input Differential input, LVDS, Bus LVDS, CML, or LVPECL compatible.
14 VDD power_in Supply pin, VDD = 3.3V ±0.3V, with at least 4 low ESR 0.01 µF bypass capacitors from VDD to the GND plane.
15 EN1 input LVTTL output enable input (active low) for channel 1; EN0 and EN1 high together put both channels in power down.
16 VDD power_in Supply pin, VDD = 3.3V ±0.3V, with at least 4 low ESR 0.01 µF bypass capacitors from VDD to the GND plane.
17 GND power_in Ground reference to LVDS and CMOS circuitry.
18 VDD power_in Supply pin, VDD = 3.3V ±0.3V, with at least 4 low ESR 0.01 µF bypass capacitors from VDD to the GND plane.
19 VDD power_in Supply pin, VDD = 3.3V ±0.3V, with at least 4 low ESR 0.01 µF bypass capacitors from VDD to the GND plane.
20 N/C unconnected Not connected.
21 GND power_in Ground reference to LVDS and CMOS circuitry.
22 VDD power_in Supply pin, VDD = 3.3V ±0.3V, with at least 4 low ESR 0.01 µF bypass capacitors from VDD to the GND plane.
23 OUT1- output LVDS differential output that can be connected to either IN0± or IN1±.
24 OUT1+ output LVDS differential output that can be connected to either IN0± or IN1±.
25 VDD power_in Supply pin (labelled VDDA in the connection diagram), VDD = 3.3V ±0.3V, with at least 4 low ESR 0.01 µF bypass capacitors from VDD to the GND plane.
26 OUT0- output LVDS differential output that can be connected to either IN0± or IN1±.
27 OUT0+ output LVDS differential output that can be connected to either IN0± or IN1±.
28 N/C unconnected Not connected.
29 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WQFN-28-EP(5x5)
Category Logic
Pins 29

CAD (KiCad official)

  • Symbol: DS90CP02SP
  • Footprint: Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm
  • 3D model: WQFN-28-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: ds90cp02sp-etched.step / ds90cp02sp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ds90cp02sp.step / ds90cp02sp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (15 pp, sha256 8d0a8913954c18b3, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF