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DS90C387VJD

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Texas Instruments LVDS ICs, TQFP-100(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DS90C387VJD

Texas Instruments · LVDS ICs · TQFP-100(14x14)

DS90C387VJD from Texas Instruments, in a TQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G11 input TTL level green data input (first pixel), 5V tolerant.
2 G10 input TTL level green data input (first pixel), 5V tolerant.
3 R17 input TTL level red data input (first pixel), 5V tolerant.
4 R16 input TTL level red data input (first pixel), 5V tolerant.
5 R15 input TTL level red data input (first pixel), 5V tolerant.
6 R14 input TTL level red data input (first pixel), 5V tolerant.
7 R13 input TTL level red data input (first pixel), 5V tolerant.
8 R12 input TTL level red data input (first pixel), 5V tolerant.
9 R11 input TTL level red data input (first pixel), 5V tolerant.
10 R10 input TTL level red data input (first pixel), 5V tolerant.
11 CLKIN input TTL level transmit clock input (40 to 112 MHz).
12 PLLVCC power_in Power supply pin for PLL circuitry, 3.0V to 3.6V.
13 GND power_in Ground pin for TTL inputs and digital circuitry.
14 PRE input Pre-emphasis level select; active when tied to VCC through an external pull-up resistor (0.75V to VCC), leave open for no pre-emphasis and do not tie to ground.
15 PLLSEL input PLL range select; must be tied to VCC for auto-range, NC or ground is reserved for future use.
16 PLLGND power_in Ground pin for PLL circuitry.
17 PLLGND power_in Ground pin for PLL circuitry.
18 PLLVCC power_in Power supply pin for PLL circuitry, 3.0V to 3.6V.
19 PLLGND power_in Ground pin for PLL circuitry.
20 R_FB input Programmable data strobe select; rising data strobe edge selected when high, falling when low.
21 R_FDE input Programmable control (DE) strobe select; tie high for data active when DE is high.
22 PD input Active-low power down; low input tri-states the LVDS outputs for low current, drive high to enable once VCC is stable.
23 DUAL input Mode select: low for single pixel, high for dual pixel, 1/2 VCC for single-in to dual-out.
24 BAL input Mode select; DC Balanced mode active when high, disabled (backward compatible) when NC or grounded.
25 LVDSGND power_in Ground pin for LVDS outputs.
26 CLK2P/NC output Additional positive LVDS clock output identical to CLK1P; no connect if not used.
27 CLK2M/NC output Additional negative LVDS clock output identical to CLK1M; no connect if not used.
28 A7P output Positive LVDS differential data output channel 7.
29 A7M output Negative LVDS differential data output channel 7.
30 LVDSVCC power_in Power supply pin for LVDS outputs, 3.0V to 3.6V.
31 A6P output Positive LVDS differential data output channel 6.
32 A6M output Negative LVDS differential data output channel 6.
33 A5P output Positive LVDS differential data output channel 5.
34 A5M output Negative LVDS differential data output channel 5.
35 LVDSGND power_in Ground pin for LVDS outputs.
36 A4P output Positive LVDS differential data output channel 4.
37 A4M output Negative LVDS differential data output channel 4.
38 A3P output Positive LVDS differential data output channel 3.
39 A3M output Negative LVDS differential data output channel 3.
40 LVDSVCC power_in Power supply pin for LVDS outputs, 3.0V to 3.6V.
41 CLK1P output Positive LVDS differential clock output.
42 CLK1M output Negative LVDS differential clock output.
43 LVDSGND power_in Ground pin for LVDS outputs.
44 A2P output Positive LVDS differential data output channel 2.
45 A2M output Negative LVDS differential data output channel 2.
46 A1P output Positive LVDS differential data output channel 1.
47 A1M output Negative LVDS differential data output channel 1.
48 LVDSVCC power_in Power supply pin for LVDS outputs, 3.0V to 3.6V.
49 A0P output Positive LVDS differential data output channel 0.
50 A0M output Negative LVDS differential data output channel 0.
51 LVDSGND power_in Ground pin for LVDS outputs.
52 GND power_in Ground pin for TTL inputs and digital circuitry.
53 VCC power_in Power supply pin for TTL inputs and digital circuitry, 3.0V to 3.6V.
54 Hsync input TTL level HSYNC control input, 5V tolerant.
55 Vsync input TTL level VSYNC control input, 5V tolerant.
56 DE input TTL level data enable input, 5V tolerant.
57 B27 input TTL level blue data input (second pixel), also used for CNTLE in DC balanced dual mode.
58 B26 input TTL level blue data input (second pixel), also used for CNTLF in DC balanced dual mode.
59 B25 input TTL level blue data input (second pixel), 5V tolerant.
60 B24 input TTL level blue data input (second pixel), 5V tolerant.
61 B23 input TTL level blue data input (second pixel), 5V tolerant.
62 B22 input TTL level blue data input (second pixel), 5V tolerant.
63 B21 input TTL level blue data input (second pixel), 5V tolerant.
64 B20 input TTL level blue data input (second pixel), 5V tolerant.
65 G27 input TTL level green data input (second pixel), 5V tolerant.
66 G26 input TTL level green data input (second pixel), 5V tolerant.
67 VCC power_in Power supply pin for TTL inputs and digital circuitry, 3.0V to 3.6V.
68 GND power_in Ground pin for TTL inputs and digital circuitry.
69 G25 input TTL level green data input (second pixel), 5V tolerant.
70 G24 input TTL level green data input (second pixel), 5V tolerant.
71 G23 input TTL level green data input (second pixel), 5V tolerant.
72 G22 input TTL level green data input (second pixel), 5V tolerant.
73 G21 input TTL level green data input (second pixel), 5V tolerant.
74 G20 input TTL level green data input (second pixel), 5V tolerant.
75 R27 input TTL level red data input (second pixel), 5V tolerant.
76 R26 input TTL level red data input (second pixel), 5V tolerant.
77 R25 input TTL level red data input (second pixel), 5V tolerant.
78 R24 input TTL level red data input (second pixel), 5V tolerant.
79 R23 input TTL level red data input (second pixel), 5V tolerant.
80 R22 input TTL level red data input (second pixel), 5V tolerant.
81 R21 input TTL level red data input (second pixel), 5V tolerant.
82 VCC power_in Power supply pin for TTL inputs and digital circuitry, 3.0V to 3.6V.
83 GND power_in Ground pin for TTL inputs and digital circuitry.
84 R20 input TTL level red data input (second pixel), 5V tolerant.
85 B17 input TTL level blue data input (first pixel), 5V tolerant.
86 B16 input TTL level blue data input (first pixel), 5V tolerant.
87 B15 input TTL level blue data input (first pixel), 5V tolerant.
88 B14 input TTL level blue data input (first pixel), 5V tolerant.
89 B13 input TTL level blue data input (first pixel), 5V tolerant.
90 B12 input TTL level blue data input (first pixel), 5V tolerant.
91 B11 input TTL level blue data input (first pixel), 5V tolerant.
92 B10 input TTL level blue data input (first pixel), 5V tolerant.
93 G17 input TTL level green data input (first pixel), 5V tolerant.
94 G16 input TTL level green data input (first pixel), 5V tolerant.
95 G15 input TTL level green data input (first pixel), 5V tolerant.
96 G14 input TTL level green data input (first pixel), 5V tolerant.
97 VCC power_in Power supply pin for TTL inputs and digital circuitry, 3.0V to 3.6V.
98 GND power_in Ground pin for TTL inputs and digital circuitry.
99 G13 input TTL level green data input (first pixel), 5V tolerant.
100 G12 input TTL level green data input (first pixel), 5V tolerant.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TQFP-100(14x14)
Category Interface
Pins 100

CAD (KiCad official)

  • Symbol: DS90C387VJD
  • Footprint: Package_QFP:TQFP-100_14x14mm_P0.5mm
  • 3D model: TQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: ds90c387vjd-etched.step / ds90c387vjd-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ds90c387vjd.step / ds90c387vjd.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (34 pp, sha256 78363f3939d3bf25, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF