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Initial commit: component/ds90c241ivsx

Ray ·80ef60de38 ·1d ago
2 files changed +521
README.mdadded+84
@@ -0,0 +1,84 @@+# DS90C241IVSX++**Texas Instruments** · Serializers, Deserializers · TQFP-48(7x7)++DS90C241IVSX from Texas Instruments, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | DIN[20] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |+| 2 | DIN[21] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |+| 3 | DIN[22] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |+| 4 | DIN[23] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |+| 5 | DCAOFF | input | LVCMOS reserved input; this pin must be tied LOW. |+| 6 | VSSL | power_in | Digital ground for Tx logic. |+| 7 | VDDL | power_in | Digital voltage supply (VDD) for Tx logic power. |+| 8 | DCBOFF | input | LVCMOS reserved input; this pin must be tied LOW. |+| 9 | TPWDNB | input | LVCMOS transmitter power-down bar; H = transmitter enabled, L = power down (sleep) with DOUT± in TRI-STATE and PLL shut down. |+| 10 | TCLK | input | LVCMOS transmitter parallel interface clock input; strobe edge set by the TRFB pin. |+| 11 | TRFB | input | LVCMOS transmitter clock edge select; H = data strobed on rising clock edge, L = falling clock edge. |+| 12 | VODSEL | input | LVCMOS VOD level select; L = approximately ±400 mV (RL = 100 Ω, normal use), H = approximately ±750 mV for long cables. |+| 13 | RESRVD | input | LVCMOS reserved input; this pin must be tied LOW. |+| 14 | VDDPT1 | power_in | Analog voltage supply (VDD) for PLL power. |+| 15 | VSSPT1 | power_in | Analog ground for PLL. |+| 16 | VDDPT0 | power_in | Analog voltage supply (VDD) for VCO power. |+| 17 | VSSPT0 | power_in | Analog ground for VCO. |+| 18 | DEN | input | LVCMOS transmitter data enable; H = LVDS driver outputs enabled, L = DOUT± in TRI-STATE with PLL still operational and locked to TCLK. |+| 19 | DOUT- | output | LVDS transmitter inverted (-) output, intended to be loaded with 100 Ω to DOUT+ and AC-coupled with a 100-nF capacitor. |+| 20 | DOUT+ | output | LVDS transmitter true (+) output, intended to be loaded with 100 Ω to DOUT- and AC-coupled with a 100-nF capacitor. |+| 21 | VSSDR | power_in | Analog ground for LVDS output. |+| 22 | VDDDR | power_in | Analog voltage supply (VDD) for LVDS output power. |+| 23 | PRE | input | Pre-emphasis level select; NC = pre-emphasis off, tie to VSS through external RPRE (recommended ≥ 3 kΩ) to set the level. |+| 24 | VSS | power_in | ESD ground. |+| 25 | DIN[0] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |+| 26 | DIN[1] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |+| 27 | DIN[2] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |+| 28 | DIN[3] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |+| 29 | DIN[4] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |+| 30 | VDDT | power_in | Digital voltage supply (VDD) for Tx serializer power. |+| 31 | VSST | power_in | Digital ground for Tx serializer. |+| 32 | DIN[5] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |+| 33 | DIN[6] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |+| 34 | DIN[7] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |+| 35 | DIN[8] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |+| 36 | DIN[9] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |+| 37 | DIN[10] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |+| 38 | DIN[11] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |+| 39 | DIN[12] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |+| 40 | DIN[13] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |+| 41 | DIN[14] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |+| 42 | VDDIT | power_in | Digital voltage supply (VDD) for Tx input power. |+| 43 | VSSIT | power_in | Digital ground for Tx input. |+| 44 | DIN[15] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |+| 45 | DIN[16] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |+| 46 | DIN[17] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |+| 47 | DIN[18] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |+| 48 | DIN[19] | input | LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TQFP-48(7x7) |+| Category | Interface |+| Pins | 48 |++## CAD (KiCad official)++- Symbol: `DS90C241IVSX`+- Footprint: `Package_QFP:TQFP-48_7x7mm_P0.5mm`+- 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)+- 3D model files: `ds90c241ivsx-etched.step` / `ds90c241ivsx-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ds90c241ivsx.step` / `ds90c241ivsx.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ds90c124) (43 pp, sha256 `b59137d02c6a2297`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ds90c241ivsx-datasheet.pdf)
page.jsonadded+437
@@ -0,0 +1,437 @@+{+  "slug": "ds90c241ivsx",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Serializers, Deserializers, TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "interface",+    "ds90c241ivsx",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "ds90c241ivsx.kicad_sym",+    "ds90c241ivsx.kicad_mod",+    "ds90c241ivsx.glb",+    "ds90c241ivsx.step",+    "ds90c241ivsx.lbr",+    "docs/hero.png",+    "docs/ds90c241ivsx-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "ds90c241ivsx-hero.glb",+    "ds90c241ivsx-hero.overlay.json"+  ],+  "component": {+    "mpn": "DS90C241IVSX",+    "manufacturer": "Texas Instruments",+    "package": "TQFP-48(7x7)",+    "pin_count": 48,+    "category": "Interface",+    "subcategory": "Serializers, Deserializers",+    "datasheet": "https://www.ti.com/cn/lit/gpn/ds90c124",+    "parts": {+      "symbol": "ds90c241ivsx.kicad_sym",+      "footprint": "ds90c241ivsx.kicad_mod",+      "model_3d": "ds90c241ivsx-hero.glb",+      "model_3d_plain": "ds90c241ivsx.glb",+      "model_3d_step": "ds90c241ivsx-etched.step",+      "model_3d_step_plain": "ds90c241ivsx.step",+      "lbr": "ds90c241ivsx.lbr"+    },+    "distributor_links": {+      "lcsc": "C2672655"+    },+    "distributor_check": {+      "checked_at": "2026-10-08T16:03:50Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": null,+        "status": "no match"+      },+      "mouser": {+        "pn": null,+        "status": "no match"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "DIN[20]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      },+      {+        "number": "2",+        "name": "DIN[21]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      },+      {+        "number": "3",+        "name": "DIN[22]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      },+      {+        "number": "4",+        "name": "DIN[23]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      },+      {+        "number": "5",+        "name": "DCAOFF",+        "type": "input",+        "description": "LVCMOS reserved input; this pin must be tied LOW."+      },+      {+        "number": "6",+        "name": "VSSL",+        "type": "power_in",+        "description": "Digital ground for Tx logic."+      },+      {+        "number": "7",+        "name": "VDDL",+        "type": "power_in",+        "description": "Digital voltage supply (VDD) for Tx logic power."+      },+      {+        "number": "8",+        "name": "DCBOFF",+        "type": "input",+        "description": "LVCMOS reserved input; this pin must be tied LOW."+      },+      {+        "number": "9",+        "name": "TPWDNB",+        "type": "input",+        "description": "LVCMOS transmitter power-down bar; H = transmitter enabled, L = power down (sleep) with DOUT± in TRI-STATE and PLL shut down."+      },+      {+        "number": "10",+        "name": "TCLK",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface clock input; strobe edge set by the TRFB pin."+      },+      {+        "number": "11",+        "name": "TRFB",+        "type": "input",+        "description": "LVCMOS transmitter clock edge select; H = data strobed on rising clock edge, L = falling clock edge."+      },+      {+        "number": "12",+        "name": "VODSEL",+        "type": "input",+        "description": "LVCMOS VOD level select; L = approximately ±400 mV (RL = 100 Ω, normal use), H = approximately ±750 mV for long cables."+      },+      {+        "number": "13",+        "name": "RESRVD",+        "type": "input",+        "description": "LVCMOS reserved input; this pin must be tied LOW."+      },+      {+        "number": "14",+        "name": "VDDPT1",+        "type": "power_in",+        "description": "Analog voltage supply (VDD) for PLL power."+      },+      {+        "number": "15",+        "name": "VSSPT1",+        "type": "power_in",+        "description": "Analog ground for PLL."+      },+      {+        "number": "16",+        "name": "VDDPT0",+        "type": "power_in",+        "description": "Analog voltage supply (VDD) for VCO power."+      },+      {+        "number": "17",+        "name": "VSSPT0",+        "type": "power_in",+        "description": "Analog ground for VCO."+      },+      {+        "number": "18",+        "name": "DEN",+        "type": "input",+        "description": "LVCMOS transmitter data enable; H = LVDS driver outputs enabled, L = DOUT± in TRI-STATE with PLL still operational and locked to TCLK."+      },+      {+        "number": "19",+        "name": "DOUT-",+        "type": "output",+        "description": "LVDS transmitter inverted (-) output, intended to be loaded with 100 Ω to DOUT+ and AC-coupled with a 100-nF capacitor."+      },+      {+        "number": "20",+        "name": "DOUT+",+        "type": "output",+        "description": "LVDS transmitter true (+) output, intended to be loaded with 100 Ω to DOUT- and AC-coupled with a 100-nF capacitor."+      },+      {+        "number": "21",+        "name": "VSSDR",+        "type": "power_in",+        "description": "Analog ground for LVDS output."+      },+      {+        "number": "22",+        "name": "VDDDR",+        "type": "power_in",+        "description": "Analog voltage supply (VDD) for LVDS output power."+      },+      {+        "number": "23",+        "name": "PRE",+        "type": "input",+        "description": "Pre-emphasis level select; NC = pre-emphasis off, tie to VSS through external RPRE (recommended ≥ 3 kΩ) to set the level."+      },+      {+        "number": "24",+        "name": "VSS",+        "type": "power_in",+        "description": "ESD ground."+      },+      {+        "number": "25",+        "name": "DIN[0]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      },+      {+        "number": "26",+        "name": "DIN[1]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      },+      {+        "number": "27",+        "name": "DIN[2]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      },+      {+        "number": "28",+        "name": "DIN[3]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      },+      {+        "number": "29",+        "name": "DIN[4]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      },+      {+        "number": "30",+        "name": "VDDT",+        "type": "power_in",+        "description": "Digital voltage supply (VDD) for Tx serializer power."+      },+      {+        "number": "31",+        "name": "VSST",+        "type": "power_in",+        "description": "Digital ground for Tx serializer."+      },+      {+        "number": "32",+        "name": "DIN[5]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      },+      {+        "number": "33",+        "name": "DIN[6]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      },+      {+        "number": "34",+        "name": "DIN[7]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      },+      {+        "number": "35",+        "name": "DIN[8]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      },+      {+        "number": "36",+        "name": "DIN[9]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      },+      {+        "number": "37",+        "name": "DIN[10]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      },+      {+        "number": "38",+        "name": "DIN[11]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      },+      {+        "number": "39",+        "name": "DIN[12]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      },+      {+        "number": "40",+        "name": "DIN[13]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      },+      {+        "number": "41",+        "name": "DIN[14]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      },+      {+        "number": "42",+        "name": "VDDIT",+        "type": "power_in",+        "description": "Digital voltage supply (VDD) for Tx input power."+      },+      {+        "number": "43",+        "name": "VSSIT",+        "type": "power_in",+        "description": "Digital ground for Tx input."+      },+      {+        "number": "44",+        "name": "DIN[15]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      },+      {+        "number": "45",+        "name": "DIN[16]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      },+      {+        "number": "46",+        "name": "DIN[17]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      },+      {+        "number": "47",+        "name": "DIN[18]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      },+      {+        "number": "48",+        "name": "DIN[19]",+        "type": "input",+        "description": "LVCMOS transmitter parallel interface data input; tie LOW if unused, do not float."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: The datasheet covers the DS90C124 deserializer and DS90C241 serializer on the same 48-pin TQFP. Only; Pin numbers were taken from the Pin Functions tables (pages 3-4) and cross-checked against the pin-m; The orderable addendum (page 34) lists DS90C241IVSX/NOPB as TQFP (PFB), 48 pins, 1000-piece large T&"+        ],+        "pages_sent": 17,+        "cost_usd": 0.1228,+        "at": "2026-10-08T16:03:24"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/ds90c124",+        "pages": 43,+        "sha256": "b59137d02c6a2297",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 48,+        "described": 48,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "ds90c241ivsx.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          9,+          9,+          1.1+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "14ca7676e4932e92f0eca0c6d56ce3018cd28a2531204a70ab7bbacb3eeb3cf5",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "ds90c241ivsx-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          9,+          9,+          1.1+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "fc4962e25cbedde426a04de527a01d2e4b95e2be2e3623ee6077f634b6e5f815",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file