component
DS8921M
Public Made by Adomby adom
Texas Instruments RS-485 / RS-422 ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DS8921M
Texas Instruments · RS-485 / RS-422 ICs · SOIC-8
DS8921M from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Power supply pin; the datasheet specifies a 5-V supply. |
| 2 | RO | output | Receiver output pin; the absolute maximum receiver output sink current is 50 mA. |
| 3 | DI | input | TTL/CMOS compatible driver input. |
| 4 | GND | power_in | Power ground pin. |
| 5 | DO- | output | Inverting differential driver output, complementary to DO+. |
| 6 | DO+ | output | Non-inverting differential driver output, complementary to DO-. |
| 7 | RI- | input | Inverting differential receiver input; the absolute maximum receiver input voltage is -10 V to 10 V. |
| 8 | RI+ | input | Non-inverting differential receiver input; the absolute maximum receiver input voltage is -10 V to 10 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Interface |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Driver input voltage | -0.5 | 7 | V | 3 | |||
| Supply voltage | 7 | V | 3 | ||||
| Output voltage | 5.5 | V | 3 | ||||
| Receiver output sink current | 50 | mA | 3 | ||||
| Receiver input voltage | -10 | 10 | V | 3 | |||
| Differential input voltage | -12 | 12 | V | 3 | |||
| Maximum package power dissipation, D package | 730 | mW | at 25°C | 3 | |||
| Derate D package above 25°C | 9.3 | mW/°C | above 25°C | 3 | |||
| Lead temperature | 260 | °C | Soldering, 4 sec. | 3 | |||
| Maximum junction temperature | 150 | °C | 3 | ||||
| Storage temperature | Tstg | -65 | 165 | °C | 3 | ||
| Supply voltage | 4.5 | 5.5 | V | 4 | |||
| Temperature (TA): DS8921/DS8921A | TA | 0 | 70 | °C | DS8921/DS8921A | 4 | |
| Threshold voltage (receiver) | VTH | -200 | 35 | 200 | mV | −7 V ≤ VCM ≤ +7 V | 4 |
| Receiver input hysteresis | VHYST | 15 | 70 | mV | −7 V ≤ VCM ≤ +7 V | 4 | |
| Receiver input resistance | RIN | 4 | 6 | kΩ | VIN = −7 V, +7 V, (Other Input = GND) | 4 | |
| Receiver input current | IIN | 3.25 | mA | VIN = 10 V | 4 | ||
| Receiver input current | IIN | -3.25 | mA | VIN = −10 V | 4 | ||
| Receiver high-level output voltage | VOH | 2.5 | V | IOH = −400 μA | 4 | ||
| Receiver low-level output voltage | VOL | 0.5 | V | IOL = 8 mA | 4 | ||
| Receiver short-circuit current | ISC | -100 | -15 | mA | VCC = MAX, VOUT = 0 V | 4 | |
| Driver high-level input voltage | VIH | 2 | V | 4 | |||
| Driver low-level input voltage | VIL | 0.8 | V | 4 | |||
| Driver low-level input current | IIL | -200 | -40 | μA | VCC = MAX, VIN = 0.4 V | 4 | |
| Driver high-level input current | IIH | 20 | μA | VCC = MAX, VIN = 2.7 V | 4 | ||
| Driver input current | II | 100 | μA | VCC = MAX, VIN = 7.0 V | 4 | ||
| Driver input clamp voltage | VCL | -1.5 | V | VCC = MIN, IIN = −18 mA | 4 | ||
| Driver high-level output voltage | VOH | 2.5 | V | VCC = MIN, IOH = −20 mA | 4 | ||
| Driver low-level output voltage | VOL | 0.5 | V | VCC = MIN, IOL = +20 mA | 4 | ||
| Driver off-state output current | IOFF | 100 | μA | VCC = 0V, VOUT = 5.5 V | 4 | ||
| Differential output voltage magnitude difference | /VT/, /VT/ | 0.4 | V | 4 | |||
| Differential output voltage | VT | 2 | V | 4 | |||
| Offset voltage difference | /VOS, VOS/ | 0.4 | V | 4 | |||
| Driver short-circuit current | ISC | -150 | -30 | mA | VCC = MAX, VOUT = 0 V | 4 | |
| Supply current | ICC | 35 | mA | VCC = MAX, VOUT = Logic 0 | 4 | ||
| Receiver propagation delay low-to-high | tpLH | 14 | 22.5 | ns | CL = 30 pF (Figure 3 and Figure 4) | 5 | |
| Receiver propagation delay high-to-low | tpHL | 14 | 22.5 | ns | CL = 30 pF (Figure 3 and Figure 4) | 5 | |
| Receiver propagation delay skew | /tpLH-tpHL/ | 0.5 | 5 | ns | CL = 30 pF (Figure 3 and Figure 4) | 5 | |
| Driver single-ended propagation delay low-to-high | tpLH | 10 | 15 | ns | CL = 30 pF (Figure 5 and Figure 6) | 5 | |
| Driver single-ended propagation delay high-to-low | tpHL | 10 | 15 | ns | CL = 30 pF (Figure 5 and Figure 6) | 5 | |
| Driver low-to-high transition time | tTLH | 5 | 8 | ns | CL = 30 pF (Figure 9 and Figure 10) | 5 | |
| Driver high-to-low transition time | tTHL | 5 | 8 | ns | CL = 30 pF (Figure 9 and Figure 10) | 5 | |
| Driver output skew | Skew | 1 | 5 | ns | CL = 30 pF(1) | 5 | |
| Driver differential propagation delay low-to-high | tpLH | 10 | 15 | ns | CL = 30 pF (Figure 5, Figure 7, and Figure 8) | 5 | |
| Driver differential propagation delay high-to-low | tpHL | 10 | 15 | ns | CL = 30 pF (Figure 5, Figure 7, and Figure 8) | 5 | |
| Driver differential propagation delay skew | /tpLH-tpHL/ | 0.5 | 6 | ns | CL = 30 pF (Figure 5, Figure 7, and Figure 8) | 5 |
CAD (KiCad official)
- Symbol:
DS8921M - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ds8921m-etched.step/ds8921m-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ds8921m.step/ds8921m.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (22 pp, sha256
95f64368dde2ce85, retrieved 2026-11-11, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DS8921M
**Texas Instruments** · RS-485 / RS-422 ICs · SOIC-8
DS8921M from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Power supply pin; the datasheet specifies a 5-V supply. |
| 2 | RO | output | Receiver output pin; the absolute maximum receiver output sink current is 50 mA. |
| 3 | DI | input | TTL/CMOS compatible driver input. |
| 4 | GND | power_in | Power ground pin. |
| 5 | DO- | output | Inverting differential driver output, complementary to DO+. |
| 6 | DO+ | output | Non-inverting differential driver output, complementary to DO-. |
| 7 | RI- | input | Inverting differential receiver input; the absolute maximum receiver input voltage is -10 V to 10 V. |
| 8 | RI+ | input | Non-inverting differential receiver input; the absolute maximum receiver input voltage is -10 V to 10 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Interface |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Driver input voltage | | -0.5 | | 7 | V | | 3 |
| Supply voltage | | | | 7 | V | | 3 |
| Output voltage | | | | 5.5 | V | | 3 |
| Receiver output sink current | | | | 50 | mA | | 3 |
| Receiver input voltage | | -10 | | 10 | V | | 3 |
| Differential input voltage | | -12 | | 12 | V | | 3 |
| Maximum package power dissipation, D package | | | | 730 | mW | at 25°C | 3 |
| Derate D package above 25°C | | | 9.3 | | mW/°C | above 25°C | 3 |
| Lead temperature | | | | 260 | °C | Soldering, 4 sec. | 3 |
| Maximum junction temperature | | | | 150 | °C | | 3 |
| Storage temperature | Tstg | -65 | | 165 | °C | | 3 |
| Supply voltage | | 4.5 | | 5.5 | V | | 4 |
| Temperature (TA): DS8921/DS8921A | TA | 0 | | 70 | °C | DS8921/DS8921A | 4 |
| Threshold voltage (receiver) | VTH | -200 | 35 | 200 | mV | −7 V ≤ VCM ≤ +7 V | 4 |
| Receiver input hysteresis | VHYST | 15 | 70 | | mV | −7 V ≤ VCM ≤ +7 V | 4 |
| Receiver input resistance | RIN | 4 | | 6 | kΩ | VIN = −7 V, +7 V, (Other Input = GND) | 4 |
| Receiver input current | IIN | | | 3.25 | mA | VIN = 10 V | 4 |
| Receiver input current | IIN | -3.25 | | | mA | VIN = −10 V | 4 |
| Receiver high-level output voltage | VOH | 2.5 | | | V | IOH = −400 μA | 4 |
| Receiver low-level output voltage | VOL | | | 0.5 | V | IOL = 8 mA | 4 |
| Receiver short-circuit current | ISC | -100 | | -15 | mA | VCC = MAX, VOUT = 0 V | 4 |
| Driver high-level input voltage | VIH | 2 | | | V | | 4 |
| Driver low-level input voltage | VIL | | | 0.8 | V | | 4 |
| Driver low-level input current | IIL | -200 | | -40 | μA | VCC = MAX, VIN = 0.4 V | 4 |
| Driver high-level input current | IIH | | | 20 | μA | VCC = MAX, VIN = 2.7 V | 4 |
| Driver input current | II | | | 100 | μA | VCC = MAX, VIN = 7.0 V | 4 |
| Driver input clamp voltage | VCL | | | -1.5 | V | VCC = MIN, IIN = −18 mA | 4 |
| Driver high-level output voltage | VOH | 2.5 | | | V | VCC = MIN, IOH = −20 mA | 4 |
| Driver low-level output voltage | VOL | | | 0.5 | V | VCC = MIN, IOL = +20 mA | 4 |
| Driver off-state output current | IOFF | | | 100 | μA | VCC = 0V, VOUT = 5.5 V | 4 |
| Differential output voltage magnitude difference | /VT/, /VT/ | | | 0.4 | V | | 4 |
| Differential output voltage | VT | 2 | | | V | | 4 |
| Offset voltage difference | /VOS, VOS/ | | | 0.4 | V | | 4 |
| Driver short-circuit current | ISC | -150 | | -30 | mA | VCC = MAX, VOUT = 0 V | 4 |
| Supply current | ICC | | | 35 | mA | VCC = MAX, VOUT = Logic 0 | 4 |
| Receiver propagation delay low-to-high | tpLH | | 14 | 22.5 | ns | CL = 30 pF (Figure 3 and Figure 4) | 5 |
| Receiver propagation delay high-to-low | tpHL | | 14 | 22.5 | ns | CL = 30 pF (Figure 3 and Figure 4) | 5 |
| Receiver propagation delay skew | /tpLH-tpHL/ | | 0.5 | 5 | ns | CL = 30 pF (Figure 3 and Figure 4) | 5 |
| Driver single-ended propagation delay low-to-high | tpLH | | 10 | 15 | ns | CL = 30 pF (Figure 5 and Figure 6) | 5 |
| Driver single-ended propagation delay high-to-low | tpHL | | 10 | 15 | ns | CL = 30 pF (Figure 5 and Figure 6) | 5 |
| Driver low-to-high transition time | tTLH | | 5 | 8 | ns | CL = 30 pF (Figure 9 and Figure 10) | 5 |
| Driver high-to-low transition time | tTHL | | 5 | 8 | ns | CL = 30 pF (Figure 9 and Figure 10) | 5 |
| Driver output skew | Skew | | 1 | 5 | ns | CL = 30 pF(1) | 5 |
| Driver differential propagation delay low-to-high | tpLH | | 10 | 15 | ns | CL = 30 pF (Figure 5, Figure 7, and Figure 8) | 5 |
| Driver differential propagation delay high-to-low | tpHL | | 10 | 15 | ns | CL = 30 pF (Figure 5, Figure 7, and Figure 8) | 5 |
| Driver differential propagation delay skew | /tpLH-tpHL/ | | 0.5 | 6 | ns | CL = 30 pF (Figure 5, Figure 7, and Figure 8) | 5 |
## CAD (KiCad official)
- Symbol: `DS8921M`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `ds8921m-etched.step` / `ds8921m-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ds8921m.step` / `ds8921m.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/ds8921.pdf) (22 pp, sha256 `95f64368dde2ce85`, retrieved 2026-11-11, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ds8921m-datasheet.pdf)