DS8921AM from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VCC	power_in	Power supply pin for the 5-V supply, with a recommended supply range of 4.5 V to 5.5 V.
2	RO	output	Receiver output pin; the absolute maximum receiver output sink current is 50 mA.
3	DI	input	TTL/CMOS compatible driver input; the absolute maximum driver input voltage range is -0.5 V to 7 V.
4	GND	power_in	Power ground pin; all voltages are referenced to this pin.
5	DO-	output	Inverting differential driver output; the absolute maximum output voltage is 5.5 V.
6	DO+	output	Non-inverting differential driver output; the absolute maximum output voltage is 5.5 V.
7	RI-	input	Inverting differential receiver input; the absolute maximum receiver input voltage range is -10 V to 10 V.
8	RI+	input	Non-inverting differential receiver input; the absolute maximum receiver input voltage range is -10 V to 10 V.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-8
Category	Interface ICs
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply Voltage				7	V		3
Driver Input Voltage		-0.5		7	V		3
Output Voltage				5.5	V		3
Receiver Output Sink Current				50	mA		3
Receiver Input Voltage		-10		10	V		3
Differential Input Voltage		-12		12	V		3
Maximum Package Power Dissipation at 25°C				730	mW	D Package	3
Lead Temperature (Soldering, 4 sec.)				260	°C	Soldering, 4 sec.	3
Maximum Junction Temperature				150	°C		3
Storage Temperature	Tstg	-65		165	°C		3
ESD Human-body model (HBM)	V(ESD)	-2000		2000	V	HBM, per ANSI/ESDA/JEDEC JS-001	4
ESD Charged-device model (CDM)	V(ESD)	-1500		1500	V	CDM, per JEDEC JESD22-C101	4
Supply Voltage		4.5		5.5	V		4
Temperature (TA): DS8921/DS8921A	TA	0		70	°C	DS8921/DS8921A	4
Threshold voltage VTH	VTH	-200	35	200	mV	−7 V ≤ VCM ≤ +7 V	4
Receiver hysteresis VHYST	VHYST	15	70		mV	−7 V ≤ VCM ≤ +7 V	4
Receiver input resistance RIN	RIN	4		6	kΩ	VIN = −7 V, +7 V, (Other Input = GND)	4
Receiver input current IIN	IIN			3.25	mA	VIN = 10 V	4
Receiver input current IIN	IIN			-3.25	mA	VIN = −10 V	4
Receiver output high voltage VOH	VOH	2.5			V	IOH = −400 μA	4
Receiver output low voltage VOL	VOL			0.5	V	IOL = 8 mA	4
Receiver short-circuit current ISC	ISC	-15		-100	mA	VCC = MAX, VOUT = 0 V	4
Driver input high voltage VIH	VIH	2			V		4
Driver input low voltage VIL	VIL			0.8	V		4
Driver low-level input current IIL	IIL	-40		-200	μA	VCC = MAX, VIN = 0.4 V	4
Driver high-level input current IIH	IIH			20	μA	VCC = MAX, VIN = 2.7 V	4
Driver input current II	II			100	μA	VCC = MAX, VIN = 7.0 V	4
Driver input clamp voltage VCL	VCL			-1.5	V	VCC = MIN, IIN = −18 mA	4
Driver output high voltage VOH	VOH	2.5			V	VCC = MIN, IOH = −20 mA	4
Driver output low voltage VOL	VOL			0.5	V	VCC = MIN, IOL = +20 mA	4
Driver power-off output leakage IOFF	IOFF			100	μA	VCC = 0V, VOUT = 5.5 V	4
Differential output voltage magnitude difference /VT/, /VT/	/VT/, /VT/			0.4	V		4
Differential output voltage VT	VT	2			V		4
Offset voltage difference /VOS, VOS/	/VOS, VOS/			0.4	V		4
Driver short-circuit current ISC	ISC	-30		-150	mA	VCC = MAX, VOUT = 0 V	4
Supply current ICC	ICC			35	mA	VCC = MAX, VOUT = Logic 0	4
Receiver propagation delay tpLH	tpLH		14	20	ns	CL = 30 pF (Figure 3 and Figure 4)	5
Receiver propagation delay tpHL	tpHL		14	20	ns	CL = 30 pF (Figure 3 and Figure 4)	5
Receiver propagation delay skew /tpLH-tpHL/	/tpLH-tpHL/		0.5	3.5	ns	CL = 30 pF (Figure 3 and Figure 4)	5
Driver single-ended propagation delay tpLH	tpLH		10	15	ns	CL = 30 pF (Figure 5 and Figure 6)	5
Driver single-ended propagation delay tpHL	tpHL		10	15	ns	CL = 30 pF (Figure 5 and Figure 6)	5
Driver output low-to-high transition time tTLH	tTLH		5	8	ns	CL = 30 pF (Figure 9 and Figure 10)	5
Driver output high-to-low transition time tTHL	tTHL		5	8	ns	CL = 30 pF (Figure 9 and Figure 10)	5
Driver output skew	Skew		1	3.5	ns	CL = 30 pF(1) (Figure 5 and Figure 6)	5
Driver differential propagation delay tpLH	tpLH		10	15	ns	CL = 30 pF (Figure 5, Figure 7, and Figure 8)	5
Driver differential propagation delay tpHL	tpHL		10	15	ns	CL = 30 pF (Figure 5, Figure 7, and Figure 8)	5
Driver differential propagation delay skew /tpLH-tpHL/	/tpLH-tpHL/		0.5	2.75	ns	CL = 30 pF (Figure 5, Figure 7, and Figure 8)	5

CAD (KiCad official)

Symbol: DS8921AM
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: ds8921am-etched.step / ds8921am-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ds8921am.step / ds8921am.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (22 pp, sha256 0be14ebc915d205b, retrieved 2026-11-02, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

DS8921AM

Verified DS8921AM

Verification log 1 record

3D Model

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Datasheet

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