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DS8604-50A3
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DSTECH Linear Voltage Regulators (LDO), SOT-89-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DS8604-50A3
DSTECH · Linear Voltage Regulators (LDO) · SOT-89-3
DS8604-50A3 from DSTECH, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power input port; datasheet recommends 2.0V to 55V input voltage and a 1uF or larger input capacitor placed close to the VIN and GND pins. |
| 2 | GND | power_in | Ground pin; input and output capacitor ground connections must return directly to this pin using short, wide traces. |
| 3 | VOUT | power_out | Power output port; datasheet specifies output capacitor effective value of 1uF to 22uF with ESR above 1mΩ, placed close to VOUT and GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | DSTECH |
| Package | SOT-89-3 |
| Category | Power Supply Chip |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage | VIN | 2 | 55 | V | 5 | ||
| Output voltage accuracy | -1 | 1 | % | ILOAD =0.1mA | 5 | ||
| Dropout voltage | VDROP | 0.66 | V | ILOAD =100mA; VOUT ≥ 5V | 5 | ||
| Quiescent current | IQ | 2.2 | μA | VOUT ≤ 5V; ILOAD = 0mA | 5 | ||
| Quiescent current with UVLO | IQ_UVLO | 3.5 | μA | With UVLO; ILOAD = 0mA | 5 | ||
| Input voltage regulation (line regulation) | ΔLINE | 0.3 | % | ILOAD =1mA, 5 ≤ VIN ≤ 55V | 5 | ||
| Load voltage regulation | ΔLOAD | 0.1 | % | 1mA≤ ILOAD ≤ 0.2A | 5 | ||
| Output current limit | ILIM | 201 | 300 | mA | VOUT =0 | 5 | |
| Power supply rejection ratio | PSRR | 70 | dB | VOUT =5V, ILOAD =1mA, VIN = 12V, f = 100Hz | 5 | ||
| Over-temperature shutdown temperature | TSD | 160 | °C | ILOAD =10mA | 5 | ||
| Over-temperature shutdown hysteresis | ΔTSD | 15 | °C | 5 | |||
| VIN to GND voltage | VIN | -0.3 | 60 | V | VIN to GND | 4 | |
| VOUT to GND voltage | VOUT | -0.3 | 14 | V | VOUT to GND | 4 | |
| VOUT to VIN voltage | VOUT-VIN | -60 | 0.3 | V | VOUT to VIN | 4 | |
| Junction-to-ambient thermal resistance SOT-89-3 | θJA | 120 | °C/W | TA = 25°C, DSTECH EVB board | 4 | ||
| Soldering temperature | 260 | °C | 10 sec. | 4 | |||
| Junction temperature | 150 | °C | 4 | ||||
| Storage temperature range | -60 | 150 | °C | 4 | |||
| ESD HBM | 2 | KV | HBM | 4 | |||
| ESD MM | 200 | V | MM | 4 | |||
| Application junction temperature range | -40 | 125 | °C | 4 | |||
| Application ambient temperature range | -40 | 85 | °C | 4 |
CAD (KiCad official)
- Symbol:
DS8604-50A3 - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files:
ds8604-50a3-etched.step/ds8604-50a3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ds8604-50a3.step/ds8604-50a3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: DSTECH datasheet (11 pp, sha256
94c6447041e97c0e, retrieved 2026-10-27, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DS8604-50A3
**DSTECH** · Linear Voltage Regulators (LDO) · SOT-89-3
DS8604-50A3 from DSTECH, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power input port; datasheet recommends 2.0V to 55V input voltage and a 1uF or larger input capacitor placed close to the VIN and GND pins. |
| 2 | GND | power_in | Ground pin; input and output capacitor ground connections must return directly to this pin using short, wide traces. |
| 3 | VOUT | power_out | Power output port; datasheet specifies output capacitor effective value of 1uF to 22uF with ESR above 1mΩ, placed close to VOUT and GND. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | DSTECH |
| Package | SOT-89-3 |
| Category | Power Supply Chip |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage | VIN | 2 | | 55 | V | | 5 |
| Output voltage accuracy | | -1 | | 1 | % | ILOAD =0.1mA | 5 |
| Dropout voltage | VDROP | | | 0.66 | V | ILOAD =100mA; VOUT ≥ 5V | 5 |
| Quiescent current | IQ | | 2.2 | | μA | VOUT ≤ 5V; ILOAD = 0mA | 5 |
| Quiescent current with UVLO | IQ_UVLO | | 3.5 | | μA | With UVLO; ILOAD = 0mA | 5 |
| Input voltage regulation (line regulation) | ΔLINE | | | 0.3 | % | ILOAD =1mA, 5 ≤ VIN ≤ 55V | 5 |
| Load voltage regulation | ΔLOAD | | 0.1 | | % | 1mA≤ ILOAD ≤ 0.2A | 5 |
| Output current limit | ILIM | 201 | 300 | | mA | VOUT =0 | 5 |
| Power supply rejection ratio | PSRR | | 70 | | dB | VOUT =5V, ILOAD =1mA, VIN = 12V, f = 100Hz | 5 |
| Over-temperature shutdown temperature | TSD | | 160 | | °C | ILOAD =10mA | 5 |
| Over-temperature shutdown hysteresis | ΔTSD | | 15 | | °C | | 5 |
| VIN to GND voltage | VIN | -0.3 | | 60 | V | VIN to GND | 4 |
| VOUT to GND voltage | VOUT | -0.3 | | 14 | V | VOUT to GND | 4 |
| VOUT to VIN voltage | VOUT-VIN | -60 | | 0.3 | V | VOUT to VIN | 4 |
| Junction-to-ambient thermal resistance SOT-89-3 | θJA | | | 120 | °C/W | TA = 25°C, DSTECH EVB board | 4 |
| Soldering temperature | | | | 260 | °C | 10 sec. | 4 |
| Junction temperature | | | | 150 | °C | | 4 |
| Storage temperature range | | -60 | | 150 | °C | | 4 |
| ESD HBM | | | | 2 | KV | HBM | 4 |
| ESD MM | | | | 200 | V | MM | 4 |
| Application junction temperature range | | -40 | | 125 | °C | | 4 |
| Application ambient temperature range | | -40 | | 85 | °C | | 4 |
## CAD (KiCad official)
- Symbol: `DS8604-50A3`
- Footprint: `Package_TO_SOT_SMD:SOT-89-3`
- 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files: `ds8604-50a3-etched.step` / `ds8604-50a3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ds8604-50a3.step` / `ds8604-50a3.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [DSTECH datasheet](docs/ds8604-50a3-datasheet.pdf) (11 pp, sha256 `94c6447041e97c0e`, retrieved 2026-10-27, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ds8604-50a3-datasheet.pdf)