component
DS8572-33S5
Public Made by Adomby adom
DSTECH Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownDS8572-33S5
DSTECH · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
DS8572-33S5 from DSTECH, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input of supply voltage, specified from 2.3V to 6V, with a 1µF or larger input capacitor placed close to the VIN and GND pins; VIN and EN to GND absolute maximum is -0.3V to 7V. |
| 2 | GND | power_in | Ground pin; input and output capacitor ground connections must return to this pin using as wide and short a copper trace as practical. |
| 3 | EN | input | Enable control input; pulling it low (VIL 0.4V falling, VIH 1.0V rising) puts the regulator into shutdown with about 100nA typical shutdown current. |
| 4 | NC | unconnected | No internal connection on this package variant. |
| 5 | VOUT | power_out | Output of the regulator, fixed at 3.3V for the DS8572-33S5 part; it is stable with a ceramic or tantalum output capacitor between 1µF and 22µF with minimum 1mΩ ESR, and VOUT to GND absolute maximum is -0.3V to 6V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | DSTECH |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VIN | 2.3 | 6 | V | 7 | ||
| DC Output Voltage Accuracy | -2 | 2 | % | ILOAD =0.1mA | 7 | ||
| Output Current Limit | ILIM | 601 | 950 | mA | VOUT =0V | 7 | |
| Shutdown Ground Current | ISD | 0.1 | 0.5 | μA | VEN = 0V, VOUT = 0V | 7 | |
| EN Input Current | IEN | 10 | 100 | nA | VEN = 5V | 7 | |
| VIN, EN to GND | -0.3 | 7 | V | 6 | |||
| VOUT to GND | -0.3 | 6 | V | 6 | |||
| VOUT to VIN | -6 | 0.3 | V | 6 | |||
| Lead Temperature (Soldering) | 260 | °C | Soldering, 10 sec. | 6 | |||
| Junction Temperature | 150 | °C | 6 | ||||
| Storage Temperature Range | -60 | 150 | °C | 6 | |||
| ESD Susceptibility HBM | -2 | kV | HBM | 6 | |||
| ESD Susceptibility MM | 200 | V | MM | 6 | |||
| ESD Susceptibility CDM | -2 | kV | CDM | 6 | |||
| Input Voltage VIN | VIN | 2.3 | 6 | V | 6 | ||
| Junction Temperature Range | -40 | 125 | °C | 6 | |||
| Ambient Temperature Range | -40 | 85 | °C | 6 | |||
| Package Thermal Resistance SOT-23-5 (junction to ambient) | θJA | 220 | °C/W | TA=25°C, DSTECH EVB board (Note 2) | 6 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | must be back to the DS8572 ground pin using as wide and as short of a copper trace as is practical. | 12 |
CAD (KiCad official)
- Symbol:
DS8572-33S5 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
ds8572-33s5-etched.step/ds8572-33s5-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ds8572-33s5.step/ds8572-33s5.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: DSTECH datasheet (16 pp, sha256
465072f372f9b049, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).