component
DS8562-18S5
Public Made by Adomby adom
DSTECH Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DS8562-18S5
DSTECH · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
DS8562-18S5 from DSTECH, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input of supply voltage, specified for 1.2V to 5.5V, with a 1µF or larger input capacitor placed close to the VIN and GND pins. |
| 2 | GND | power_in | Ground reference for the regulator; input and output capacitor grounds must return to this pin through as wide and as short a copper trace as practical. |
| 3 | EN | input | Enable control input with VIH of 1.0V (rising) and VIL of 0.4V (falling); pulling it low puts the regulator in shutdown with typical 100nA shutdown current. |
| 4 | NC | unconnected | No internal connection. |
| 5 | VOUT | power_out | Regulated output of the LDO (1.8V for the DS8562-18S5), stable with 1µF to 22µF ceramic or tantalum output capacitance and minimum 1mΩ ESR, with output current limited to 1100mA typical. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | DSTECH |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VIN | 1.2 | 5.5 | V | 7 | ||
| DC Output Voltage Accuracy | -2 | 2 | % | ILOAD =0.1mA | 7 | ||
| Output Current Limit | ILIM | 601 | 1100 | mA | VOUT =0V | 7 | |
| Shutdown Ground Current | ISD | 0.1 | 0.5 | μA | VEN = 0V, VOUT = 0V | 7 | |
| EN Input Current | IEN | 10 | 100 | nA | VEN = 5V | 7 | |
| VIN to GND | -0.3 | 7 | V | 6 | |||
| VOUT, EN to GND | -0.3 | 6 | V | 6 | |||
| VOUT to VIN | -6 | 0.3 | V | 6 | |||
| Storage Temperature Range | -60 | 150 | °C | 6 | |||
| Input Voltage (recommended) | VIN | 1.2 | 5.5 | V | 6 | ||
| Junction Temperature Range | TJ | -40 | 125 | °C | 6 | ||
| Ambient Temperature Range | TA | -40 | 85 | °C | 6 | ||
| Thermal Shutdown Temperature | TSD | 155 | °C | ILOAD =10mA | 7 | ||
| Thermal Shutdown Hysteresis | ΔTSD | 15 | °C | 7 | |||
| Discharge Resistance | RDC | 30 | Ω | EN = 0V , VOUT = 0.1V | 7 | ||
| Thermal Resistance, junction-to-ambient, SOT-23-5 | θJA | 200 | oC/W | Note 2: TA = 25°C, DSTECH EVB board; printed as a single value, column not stated | 6 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | must be back to the DS8562 ground pin using as wide and as short of a copper trace as is practical. | 13 |
CAD (KiCad official)
- Symbol:
DS8562-18S5 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
ds8562-18s5-etched.step/ds8562-18s5-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ds8562-18s5.step/ds8562-18s5.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: DSTECH datasheet (17 pp, sha256
687339a5a48c3c15, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DS8562-18S5
**DSTECH** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
DS8562-18S5 from DSTECH, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input of supply voltage, specified for 1.2V to 5.5V, with a 1µF or larger input capacitor placed close to the VIN and GND pins. |
| 2 | GND | power_in | Ground reference for the regulator; input and output capacitor grounds must return to this pin through as wide and as short a copper trace as practical. |
| 3 | EN | input | Enable control input with VIH of 1.0V (rising) and VIL of 0.4V (falling); pulling it low puts the regulator in shutdown with typical 100nA shutdown current. |
| 4 | NC | unconnected | No internal connection. |
| 5 | VOUT | power_out | Regulated output of the LDO (1.8V for the DS8562-18S5), stable with 1µF to 22µF ceramic or tantalum output capacitance and minimum 1mΩ ESR, with output current limited to 1100mA typical. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | DSTECH |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VIN | 1.2 | | 5.5 | V | | 7 |
| DC Output Voltage Accuracy | | -2 | | 2 | % | ILOAD =0.1mA | 7 |
| Output Current Limit | ILIM | 601 | 1100 | | mA | VOUT =0V | 7 |
| Shutdown Ground Current | ISD | | 0.1 | 0.5 | μA | VEN = 0V, VOUT = 0V | 7 |
| EN Input Current | IEN | | 10 | 100 | nA | VEN = 5V | 7 |
| VIN to GND | | -0.3 | | 7 | V | | 6 |
| VOUT, EN to GND | | -0.3 | | 6 | V | | 6 |
| VOUT to VIN | | -6 | | 0.3 | V | | 6 |
| Storage Temperature Range | | -60 | | 150 | °C | | 6 |
| Input Voltage (recommended) | VIN | 1.2 | | 5.5 | V | | 6 |
| Junction Temperature Range | TJ | -40 | | 125 | °C | | 6 |
| Ambient Temperature Range | TA | -40 | | 85 | °C | | 6 |
| Thermal Shutdown Temperature | TSD | | 155 | | °C | ILOAD =10mA | 7 |
| Thermal Shutdown Hysteresis | ΔTSD | | 15 | | °C | | 7 |
| Discharge Resistance | RDC | | 30 | | Ω | EN = 0V , VOUT = 0.1V | 7 |
| Thermal Resistance, junction-to-ambient, SOT-23-5 | θJA | | 200 | | oC/W | Note 2: TA = 25°C, DSTECH EVB board; printed as a single value, column not stated | 6 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | | must be back to the DS8562 ground pin using as wide and as short of a copper trace as is practical. | 13 |
## CAD (KiCad official)
- Symbol: `DS8562-18S5`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `ds8562-18s5-etched.step` / `ds8562-18s5-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ds8562-18s5.step` / `ds8562-18s5.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [DSTECH datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602901282601005056) (17 pp, sha256 `687339a5a48c3c15`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ds8562-18s5-datasheet.pdf)