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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs ds8561-33s5: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
ds8561-33s5-etched.fit.json ds8561-33s5: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ds8561-33s5-etched.glb ds8561-33s5: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray
ds8561-33s5-etched.step ds8561-33s5: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray
ds8561-33s5.glb Publish 0.1.0 · Ray
ds8561-33s5.kicad_mod Publish 0.1.0 · Ray
ds8561-33s5.kicad_sym Publish 0.1.0 · Ray
ds8561-33s5.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
ds8561-33s5.step Publish 0.1.0 · Ray
package.json Publish 0.2.1 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json Publish 0.2.1 · Ray
README.md ds8561-33s5: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

DS8561-33S5

DSTECH · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

DS8561-33S5 from DSTECH, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Power supply input, 1.2V to 5.5V (absolute max 7V). A 1μF ceramic bypass capacitor to GND is recommended close to the pin.
2 GND power_in Device ground reference.
3 EN input Enable control input. VIH ≥ 1.0V enables the regulator; VIL ≤ 0.4V puts the part into shutdown (~100nA typ.). EN input current ≈10nA at VEN=5V. Do not leave floating; tie to VIN for always-on.
4 NC unconnected No internal connection (floating). May be left open or tied to any potential without affecting operation.
5 VOUT power_out Regulated 3.3V output, up to 300mA. Requires a ≥1μF ceramic (or tantalum) output capacitor to GND for stability. Dropout ≈0.18V at ILOAD=300mA for the 3.3V option; internally current-limited (~600mA typ.).

Key specifications

Parameter Value
Manufacturer DSTECH
Package SOT-23-5
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • DS8561-33S5
  • DS8561-33S5SS3
  • DS8561-33S5S3
  • DS8561-33S5C5
  • DS8561-33S5D4
  • DS8561-33S5D6

CAD (KiCad official)

  • Symbol: DS8561-33S5
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: ds8561-33s5-etched.step / ds8561-33s5-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ds8561-33s5.step / ds8561-33s5.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ds8561-33s5.step 85 KB You want the bare part, or you mark your own boards.
ds8561-33s5-etched.step 2.6 MB You want the part with DS8561-33S5 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 605 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: DSTECH datasheet (19 pp, sha256 b28c6b5e18533c57, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF