component
DS8561-28S5
Public Made by Adomby adom
DSTECH Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DS8561-28S5
DSTECH · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT23-5
DS8561-28S5 from DSTECH, in a SOT23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power input pin, operating input voltage range 1.2V to 5.5V, with absolute maximum VIN to GND of -0.3V to 7V. |
| 2 | GND | power_in | Ground pin for the regulator; input and output capacitor ground connections must return to this pin with short, wide traces. |
| 3 | EN | input | Enable control input: EN rising threshold VIH is 1.0V and falling threshold VIL is 0.4V, and pulling EN low puts the device into shutdown; absolute maximum EN to GND is -0.3V to 6V. |
| 4 | NC | unconnected | No-connect pin that is left floating and is not connected internally. |
| 5 | VOUT | power_out | Regulated output voltage pin (2.8V for this variant), with absolute maximum VOUT to GND of -0.3V to 6V; output capacitor of 1uF to 22uF with ESR above 1mΩ should be placed close to VOUT and GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | DSTECH |
| Package | SOT23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
CAD (KiCad official)
- Symbol:
DS8561-28S5 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT23-5 (KiCad packages3D, STEP)
- 3D model files:
ds8561-28s5-etched.step/ds8561-28s5-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ds8561-28s5.step/ds8561-28s5.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: DSTECH datasheet (19 pp, sha256
b28c6b5e18533c57, retrieved 2026-10-09, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DS8561-28S5
**DSTECH** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT23-5
DS8561-28S5 from DSTECH, in a SOT23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power input pin, operating input voltage range 1.2V to 5.5V, with absolute maximum VIN to GND of -0.3V to 7V. |
| 2 | GND | power_in | Ground pin for the regulator; input and output capacitor ground connections must return to this pin with short, wide traces. |
| 3 | EN | input | Enable control input: EN rising threshold VIH is 1.0V and falling threshold VIL is 0.4V, and pulling EN low puts the device into shutdown; absolute maximum EN to GND is -0.3V to 6V. |
| 4 | NC | unconnected | No-connect pin that is left floating and is not connected internally. |
| 5 | VOUT | power_out | Regulated output voltage pin (2.8V for this variant), with absolute maximum VOUT to GND of -0.3V to 6V; output capacitor of 1uF to 22uF with ESR above 1mΩ should be placed close to VOUT and GND. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | DSTECH |
| Package | SOT23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## CAD (KiCad official)
- Symbol: `DS8561-28S5`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT23-5 (KiCad packages3D, STEP)
- 3D model files: `ds8561-28s5-etched.step` / `ds8561-28s5-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ds8561-28s5.step` / `ds8561-28s5.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [DSTECH datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603155558086295552) (19 pp, sha256 `b28c6b5e18533c57`, retrieved 2026-10-09, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ds8561-28s5-datasheet.pdf)