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DS8500-JND+T&R

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Analog Devices Interface - Specialized, QFN-20-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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docs ds8500-jnd-t-r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers ds8500-jnd-t-r: viewers · Ray
ds8500-jnd-t-r-etched.fit.json ds8500-jnd-t-r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ds8500-jnd-t-r-etched.glb ds8500-jnd-t-r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ds8500-jnd-t-r-etched.step ds8500-jnd-t-r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
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README.md Initial commit: component/ds8500-jnd-t-r · Ray

DS8500-JND+T&R

Analog Devices · Interface - Specialized · QFN-20-EP(5x5)

DS8500-JND+T&R from Analog Devices, in a QFN-20-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DVDD power_in Digital Supply Voltage, 2.7V to 3.6V operating range.
2 DVDD power_in Digital Supply Voltage, 2.7V to 3.6V operating range.
3 DGND power_in Digital Ground.
4 RST bidirectional Active-Low Reset digital input/output with internal pullup resistor, driven low when internal reset condition occurs.
5 OCD output Carrier Detect digital output, logic-high when FSK_IN amplitude exceeds 120mVP-P, logic-low when below 80mVP-P.
6 RTS input Request to Send digital input, high selects demodulator mode, low selects modulator mode.
7 XTAL1 passive Crystal Pin or External Clock Input at 3.6864MHz.
8 XTAL2 passive Crystal Pin or Crystal Amplifier Output.
9 DGND power_in Digital Ground.
10 XCEN input External Clock Enable digital input, high allows external clock on XTAL1 with XTAL2 unconnected, low requires crystal between XTAL1 and XTAL2.
11 AVDD power_in Analog Supply Voltage, 2.7V to 3.6V operating range.
12 FSK_OUT output FSK Output, analog signal with phase-continuous FSK modulation at 1200Hz (mark) or 2200Hz (space) for 4-20mA loop.
13 REF output Reference Output, 1.23V internal reference in demodulator mode, must connect 0.1µF capacitor to this pin.
14 FSK_IN input FSK Input, analog FSK-modulated HART receive signal from 4-20mA current loop, input range 0V to VREF.
15 AGND power_in Analog Ground.
16 DGND power_in Digital Ground.
17 MODE input Mode Select digital input, tie high for HART applications or low for legacy design support.
18 DGND power_in Digital Ground.
19 D_OUT output Digital Data Output from demodulator at 1200 bits per second.
20 D_IN input Digital Data Input to modulator in UART format (start, 8 data bits, parity, stop bit).
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Analog Devices
Package QFN-20-EP(5x5)
Category Interface
Pins 21

CAD (KiCad official)

  • Symbol: DS8500-JND+T&R
  • Footprint: Package_DFN_QFN:QFN-20-1EP_5x5mm_P0.65mm_EP3.35x3.35mm
  • 3D model: QFN-20-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: ds8500-jnd-t-r-etched.step / ds8500-jnd-t-r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ds8500-jnd-t-r.step / ds8500-jnd-t-r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (7 pp, sha256 b4e09a4d496071c3, retrieved 2026-09-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF