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DS8500-JND+T&R
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Analog Devices Interface - Specialized, QFN-20-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+57@@ -0,0 +1,57 @@+# DS8500-JND+T&R++**Analog Devices** · Interface - Specialized · QFN-20-EP(5x5)++DS8500-JND+T&R from Analog Devices, in a QFN-20-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | DVDD | power_in | Digital Supply Voltage, 2.7V to 3.6V operating range. |+| 2 | DVDD | power_in | Digital Supply Voltage, 2.7V to 3.6V operating range. |+| 3 | DGND | power_in | Digital Ground. |+| 4 | RST | bidirectional | Active-Low Reset digital input/output with internal pullup resistor, driven low when internal reset condition occurs. |+| 5 | OCD | output | Carrier Detect digital output, logic-high when FSK_IN amplitude exceeds 120mVP-P, logic-low when below 80mVP-P. |+| 6 | RTS | input | Request to Send digital input, high selects demodulator mode, low selects modulator mode. |+| 7 | XTAL1 | passive | Crystal Pin or External Clock Input at 3.6864MHz. |+| 8 | XTAL2 | passive | Crystal Pin or Crystal Amplifier Output. |+| 9 | DGND | power_in | Digital Ground. |+| 10 | XCEN | input | External Clock Enable digital input, high allows external clock on XTAL1 with XTAL2 unconnected, low requires crystal between XTAL1 and XTAL2. |+| 11 | AVDD | power_in | Analog Supply Voltage, 2.7V to 3.6V operating range. |+| 12 | FSK_OUT | output | FSK Output, analog signal with phase-continuous FSK modulation at 1200Hz (mark) or 2200Hz (space) for 4-20mA loop. |+| 13 | REF | output | Reference Output, 1.23V internal reference in demodulator mode, must connect 0.1µF capacitor to this pin. |+| 14 | FSK_IN | input | FSK Input, analog FSK-modulated HART receive signal from 4-20mA current loop, input range 0V to VREF. |+| 15 | AGND | power_in | Analog Ground. |+| 16 | DGND | power_in | Digital Ground. |+| 17 | MODE | input | Mode Select digital input, tie high for HART applications or low for legacy design support. |+| 18 | DGND | power_in | Digital Ground. |+| 19 | D_OUT | output | Digital Data Output from demodulator at 1200 bits per second. |+| 20 | D_IN | input | Digital Data Input to modulator in UART format (start, 8 data bits, parity, stop bit). |+| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Analog Devices |+| Package | QFN-20-EP(5x5) |+| Category | Interface |+| Pins | 21 |++## CAD (KiCad official)++- Symbol: `DS8500-JND+T&R`+- Footprint: `Package_DFN_QFN:QFN-20-1EP_5x5mm_P0.65mm_EP3.35x3.35mm`+- 3D model: QFN-20-EP(5x5) (KiCad packages3D, STEP)+- 3D model files: `ds8500-jnd-t-r-etched.step` / `ds8500-jnd-t-r-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ds8500-jnd-t-r.step` / `ds8500-jnd-t-r.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Analog Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588893706107957248) (7 pp, sha256 `b4e09a4d496071c3`, retrieved 2026-09-17, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ds8500-jnd-t-r-datasheet.pdf)
page.jsonadded+222@@ -0,0 +1,222 @@+{+ "slug": "ds8500-jnd-t-r",+ "version": "0.1.0",+ "type": "component",+ "description": "Analog Devices Interface - Specialized, QFN-20-EP(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "interface",+ "ds8500-jnd+t&r",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "ds8500-jnd-t-r.kicad_sym",+ "ds8500-jnd-t-r.kicad_mod",+ "ds8500-jnd-t-r.glb",+ "ds8500-jnd-t-r.step",+ "ds8500-jnd-t-r.lbr",+ "docs/hero.png",+ "docs/ds8500-jnd-t-r-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "DS8500-JND+T&R",+ "manufacturer": "Analog Devices",+ "package": "QFN-20-EP(5x5)",+ "pin_count": 21,+ "category": "Interface",+ "subcategory": "Interface - Specialized",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588893706107957248",+ "parts": {+ "symbol": "ds8500-jnd-t-r.kicad_sym",+ "footprint": "ds8500-jnd-t-r.kicad_mod",+ "model_3d": "ds8500-jnd-t-r-etched.glb",+ "model_3d_plain": "ds8500-jnd-t-r.glb",+ "model_3d_step": "ds8500-jnd-t-r-etched.step",+ "model_3d_step_plain": "ds8500-jnd-t-r.step",+ "lbr": "ds8500-jnd-t-r.lbr"+ },+ "distributor_links": {+ "lcsc": "C709721"+ },+ "pins": [+ {+ "number": "1",+ "name": "DVDD",+ "type": "power_in",+ "description": "Digital Supply Voltage, 2.7V to 3.6V operating range."+ },+ {+ "number": "2",+ "name": "DVDD",+ "type": "power_in",+ "description": "Digital Supply Voltage, 2.7V to 3.6V operating range."+ },+ {+ "number": "3",+ "name": "DGND",+ "type": "power_in",+ "description": "Digital Ground."+ },+ {+ "number": "4",+ "name": "RST",+ "type": "bidirectional",+ "description": "Active-Low Reset digital input/output with internal pullup resistor, driven low when internal reset condition occurs."+ },+ {+ "number": "5",+ "name": "OCD",+ "type": "output",+ "description": "Carrier Detect digital output, logic-high when FSK_IN amplitude exceeds 120mVP-P, logic-low when below 80mVP-P."+ },+ {+ "number": "6",+ "name": "RTS",+ "type": "input",+ "description": "Request to Send digital input, high selects demodulator mode, low selects modulator mode."+ },+ {+ "number": "7",+ "name": "XTAL1",+ "type": "passive",+ "description": "Crystal Pin or External Clock Input at 3.6864MHz."+ },+ {+ "number": "8",+ "name": "XTAL2",+ "type": "passive",+ "description": "Crystal Pin or Crystal Amplifier Output."+ },+ {+ "number": "9",+ "name": "DGND",+ "type": "power_in",+ "description": "Digital Ground."+ },+ {+ "number": "10",+ "name": "XCEN",+ "type": "input",+ "description": "External Clock Enable digital input, high allows external clock on XTAL1 with XTAL2 unconnected, low requires crystal between XTAL1 and XTAL2."+ },+ {+ "number": "11",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog Supply Voltage, 2.7V to 3.6V operating range."+ },+ {+ "number": "12",+ "name": "FSK_OUT",+ "type": "output",+ "description": "FSK Output, analog signal with phase-continuous FSK modulation at 1200Hz (mark) or 2200Hz (space) for 4-20mA loop."+ },+ {+ "number": "13",+ "name": "REF",+ "type": "output",+ "description": "Reference Output, 1.23V internal reference in demodulator mode, must connect 0.1µF capacitor to this pin."+ },+ {+ "number": "14",+ "name": "FSK_IN",+ "type": "input",+ "description": "FSK Input, analog FSK-modulated HART receive signal from 4-20mA current loop, input range 0V to VREF."+ },+ {+ "number": "15",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog Ground."+ },+ {+ "number": "16",+ "name": "DGND",+ "type": "power_in",+ "description": "Digital Ground."+ },+ {+ "number": "17",+ "name": "MODE",+ "type": "input",+ "description": "Mode Select digital input, tie high for HART applications or low for legacy design support."+ },+ {+ "number": "18",+ "name": "DGND",+ "type": "power_in",+ "description": "Digital Ground."+ },+ {+ "number": "19",+ "name": "D_OUT",+ "type": "output",+ "description": "Digital Data Output from demodulator at 1200 bits per second."+ },+ {+ "number": "20",+ "name": "D_IN",+ "type": "input",+ "description": "Digital Data Input to modulator in UART format (start, 8 data bits, parity, stop bit)."+ },+ {+ "number": "21",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "exposed pad 21 added from the footprint",+ "dropped thermal pad ['EP'] absent from footprint"+ ],+ "pages_sent": 7,+ "cost_usd": 0.1764,+ "at": "2026-09-17T23:32:49"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588893706107957248",+ "pages": 7,+ "sha256": "b4e09a4d496071c3",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 21,+ "described": 21,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}