component
DS8403-50S5
Public Made by Adomby adom
DSTECH Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DS8403-50S5
DSTECH · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
DS8403-50S5 from DSTECH, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input of supply voltage, recommended range 2.5V to 36V with an absolute maximum of 40V, and a 1µF or larger input capacitor should be placed close to the VIN and GND pins. |
| 2 | GND | power_in | Ground reference pin, to which the input and output capacitor grounds should return through as wide and as short a copper trace as is practical. |
| 3 | EN | input | Enable control input with a rising threshold of 1.1V minimum and a falling threshold of 0.4V maximum; pulling it low shuts the regulator down, and the absolute maximum on this pin is 40V. |
| 4 | NC | unconnected | No internal connection on the fixed-output DS8403-AABB SOT-23-5 package (the SNS sense function is only on the DS8403N variant). |
| 5 | VOUT | power_out | Output of the regulator, fixed at 5.0V for the -50 option, with an absolute maximum of 14V to GND and a ceramic output capacitor between 1µF and 22µF with at least 1mΩ ESR placed close to the VOUT and GND pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | DSTECH |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VIN | 2.5 | 40 | V | 6 | ||
| DC Output Voltage Accuracy | -1 | 1 | % | ILOAD =0.1mA | 6 | ||
| Dropout Voltage | VDROP | 0.35 | V | ILOAD =100mA; VOUT >= 5V | 6 | ||
| Shutdown Ground Current | ISD | 0.1 | 0.5 | uA | VEN = 0V, VOUT = 0V | 6 | |
| EN Input Current | IEN | 10 | 100 | nA | VEN = 24V | 6 | |
| Line Regulation | DLINE | 0.8 | % | ILOAD =1mA, 10V <= VIN <= 20V | 6 | ||
| Output Current Limit | ILIM | 501 | 700 | mA | VOUT =0 | 6 | |
| Input Voltage VIN, EN to GND | -0.3 | 40 | V | 5 | |||
| VOUT to GND | -0.3 | 14 | V | 5 | |||
| VOUT to VIN | -45 | 0.3 | V | 5 | |||
| Junction Temperature | 150 | degC | 5 | ||||
| Storage Temperature Range | -40 | 150 | degC | 5 | |||
| ESD Susceptibility HBM | 2 | KV | 5 | ||||
| ESD Susceptibility MM | 200 | V | 5 | ||||
| Input Voltage VIN | VIN | 2.5 | 36 | V | 5 | ||
| Junction Temperature Range | -40 | 125 | degC | 5 | |||
| Ambient Temperature Range | -40 | 85 | degC | 5 | |||
| Ground Current | IQ | 2 | uA | ILOAD = 0mA; VOUT <= 5V | 6 | ||
| Enable Threshold Voltage (rising) | VIH | 1.1 | V | EN Rising | 6 | ||
| Enable Threshold Voltage (falling) | VIL | 0.4 | V | EN Falling | 6 | ||
| Load Regulation | DLOAD | 0.5 | % | 10mA <= ILOAD <= 0.1A | 6 | ||
| Thermal Shutdown Temperature | TSD | 160 | degC | ILOAD =10mA | 6 | ||
| Thermal Shutdown Hysteresis | DTSD | 30 | degC | 6 | |||
| Package Thermal Resistance, SOT-23-5 junction-to-ambient | thetaJA | 220 | degC/W | TA=25 degC, DSTECH EVB board | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | must be back to the DS8403 ground pin using as wide and as short of a copper trace as is practical. | 10 |
CAD (KiCad official)
- Symbol:
DS8403-50S5 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
ds8403-50s5-etched.step/ds8403-50s5-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ds8403-50s5.step/ds8403-50s5.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: DSTECH datasheet (12 pp, sha256
f2a7ea1ae70f9ad0, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DS8403-50S5
**DSTECH** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
DS8403-50S5 from DSTECH, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input of supply voltage, recommended range 2.5V to 36V with an absolute maximum of 40V, and a 1µF or larger input capacitor should be placed close to the VIN and GND pins. |
| 2 | GND | power_in | Ground reference pin, to which the input and output capacitor grounds should return through as wide and as short a copper trace as is practical. |
| 3 | EN | input | Enable control input with a rising threshold of 1.1V minimum and a falling threshold of 0.4V maximum; pulling it low shuts the regulator down, and the absolute maximum on this pin is 40V. |
| 4 | NC | unconnected | No internal connection on the fixed-output DS8403-AABB SOT-23-5 package (the SNS sense function is only on the DS8403N variant). |
| 5 | VOUT | power_out | Output of the regulator, fixed at 5.0V for the -50 option, with an absolute maximum of 14V to GND and a ceramic output capacitor between 1µF and 22µF with at least 1mΩ ESR placed close to the VOUT and GND pins. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | DSTECH |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VIN | 2.5 | | 40 | V | | 6 |
| DC Output Voltage Accuracy | | -1 | | 1 | % | ILOAD =0.1mA | 6 |
| Dropout Voltage | VDROP | | | 0.35 | V | ILOAD =100mA; VOUT >= 5V | 6 |
| Shutdown Ground Current | ISD | | 0.1 | 0.5 | uA | VEN = 0V, VOUT = 0V | 6 |
| EN Input Current | IEN | | 10 | 100 | nA | VEN = 24V | 6 |
| Line Regulation | DLINE | | | 0.8 | % | ILOAD =1mA, 10V <= VIN <= 20V | 6 |
| Output Current Limit | ILIM | 501 | | 700 | mA | VOUT =0 | 6 |
| Input Voltage VIN, EN to GND | | -0.3 | | 40 | V | | 5 |
| VOUT to GND | | -0.3 | | 14 | V | | 5 |
| VOUT to VIN | | -45 | | 0.3 | V | | 5 |
| Junction Temperature | | | | 150 | degC | | 5 |
| Storage Temperature Range | | -40 | | 150 | degC | | 5 |
| ESD Susceptibility HBM | | | | 2 | KV | | 5 |
| ESD Susceptibility MM | | | | 200 | V | | 5 |
| Input Voltage VIN | VIN | 2.5 | | 36 | V | | 5 |
| Junction Temperature Range | | -40 | | 125 | degC | | 5 |
| Ambient Temperature Range | | -40 | | 85 | degC | | 5 |
| Ground Current | IQ | | 2 | | uA | ILOAD = 0mA; VOUT <= 5V | 6 |
| Enable Threshold Voltage (rising) | VIH | | 1.1 | | V | EN Rising | 6 |
| Enable Threshold Voltage (falling) | VIL | | 0.4 | | V | EN Falling | 6 |
| Load Regulation | DLOAD | | 0.5 | | % | 10mA <= ILOAD <= 0.1A | 6 |
| Thermal Shutdown Temperature | TSD | | 160 | | degC | ILOAD =10mA | 6 |
| Thermal Shutdown Hysteresis | DTSD | | 30 | | degC | | 6 |
| Package Thermal Resistance, SOT-23-5 junction-to-ambient | thetaJA | | 220 | | degC/W | TA=25 degC, DSTECH EVB board | 5 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | | must be back to the DS8403 ground pin using as wide and as short of a copper trace as is practical. | 10 |
## CAD (KiCad official)
- Symbol: `DS8403-50S5`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `ds8403-50s5-etched.step` / `ds8403-50s5-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ds8403-50s5.step` / `ds8403-50s5.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [DSTECH datasheet](docs/ds8403-50s5-datasheet.pdf) (12 pp, sha256 `f2a7ea1ae70f9ad0`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ds8403-50s5-datasheet.pdf)