component
DS8402-50A3L
Public Made by Adomby adom
DSTECH Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DS8402-50A3L
DSTECH · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3
DS8402-50A3L from DSTECH, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Regulated output of the LDO, rated for 200mA output peak current, with an output capacitor of 1µF to 22µF and minimum 1mΩ ESR placed close to the VOUT and GND pins. |
| 2 | GND | power_in | Ground reference pin, to which the input and output capacitor grounds must return through as wide and as short a copper trace as is practical. |
| 3 | VIN | power_in | Input supply pin with a recommended range of 2.5V to 36V (absolute maximum VIN to GND of 40V), where a 1µF or larger input capacitor should be placed close to the VIN and GND pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | DSTECH |
| Package | SOT-89-3 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VIN | 2.5 | 36 | V | 5 | ||
| DC Output Voltage Accuracy | -1 | 1 | % | ILOAD =0.1mA | 5 | ||
| Dropout Voltage | VDROP | 0.35 | V | ILOAD =100mA; VOUT ≥ 5V | 5 | ||
| Ground Current | IQ | 2 | μA | ILOAD = 0mA; VOUT ≤ 5V | 5 | ||
| Line Regulation | ΔLINE | 0.8 | % | ILOAD =1mA, 10V ≤ VIN ≤ 20V | 5 | ||
| Load Regulation | ΔLOAD | 0.5 | % | 10mA≤ ILOAD ≤ 0.1A | 5 | ||
| Output Current Limit | ILIM | 201 | 350 | mA | VOUT =0V | 5 | |
| Input Voltage (absolute max, VIN to GND) | VIN to GND | -0.3 | 40 | V | 4 | ||
| VOUT to GND (absolute max) | VOUT to GND | -0.3 | 14 | V | 4 | ||
| VOUT to VIN (absolute max) | VOUT to VIN | -40 | 0.3 | V | 4 | ||
| Lead Temperature (soldering) | 260 | oC | Soldering, 10 sec. | 4 | |||
| Junction Temperature | 150 | oC | 4 | ||||
| Storage Temperature Range | -40 | 150 | oC | 4 | |||
| ESD HBM | 2 | KV | HBM | 4 | |||
| ESD MM | 200 | V | MM | 4 | |||
| Package Thermal Resistance SOT-89-3 | θJA | 120 | oC /W | SOT-89-3; TA=25°C, DSTECH EVB board (Note 2) | 4 | ||
| Input Voltage (recommended) | VIN | 2.5 | 36 | V | 4 | ||
| Junction Temperature Range (recommended) | -40 | 125 | oC | 4 | |||
| Ambient Temperature Range (recommended) | -40 | 85 | oC | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | must be back to the DS8402 ground pin using as wide and as short of a copper trace as is practical. | 9 |
CAD (KiCad official)
- Symbol:
DS8402-50A3L - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files:
ds8402-50a3l-etched.step/ds8402-50a3l-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ds8402-50a3l.step/ds8402-50a3l.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: DSTECH datasheet (13 pp, sha256
920d1bd86b5963da, retrieved 2026-11-05, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DS8402-50A3L
**DSTECH** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3
DS8402-50A3L from DSTECH, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Regulated output of the LDO, rated for 200mA output peak current, with an output capacitor of 1µF to 22µF and minimum 1mΩ ESR placed close to the VOUT and GND pins. |
| 2 | GND | power_in | Ground reference pin, to which the input and output capacitor grounds must return through as wide and as short a copper trace as is practical. |
| 3 | VIN | power_in | Input supply pin with a recommended range of 2.5V to 36V (absolute maximum VIN to GND of 40V), where a 1µF or larger input capacitor should be placed close to the VIN and GND pins. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | DSTECH |
| Package | SOT-89-3 |
| Category | Power Management (PMIC) |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VIN | 2.5 | | 36 | V | | 5 |
| DC Output Voltage Accuracy | | -1 | | 1 | % | ILOAD =0.1mA | 5 |
| Dropout Voltage | VDROP | | | 0.35 | V | ILOAD =100mA; VOUT ≥ 5V | 5 |
| Ground Current | IQ | | | 2 | μA | ILOAD = 0mA; VOUT ≤ 5V | 5 |
| Line Regulation | ΔLINE | | | 0.8 | % | ILOAD =1mA, 10V ≤ VIN ≤ 20V | 5 |
| Load Regulation | ΔLOAD | | | 0.5 | % | 10mA≤ ILOAD ≤ 0.1A | 5 |
| Output Current Limit | ILIM | 201 | 350 | | mA | VOUT =0V | 5 |
| Input Voltage (absolute max, VIN to GND) | VIN to GND | -0.3 | | 40 | V | | 4 |
| VOUT to GND (absolute max) | VOUT to GND | -0.3 | | 14 | V | | 4 |
| VOUT to VIN (absolute max) | VOUT to VIN | -40 | | 0.3 | V | | 4 |
| Lead Temperature (soldering) | | | | 260 | oC | Soldering, 10 sec. | 4 |
| Junction Temperature | | | | 150 | oC | | 4 |
| Storage Temperature Range | | -40 | | 150 | oC | | 4 |
| ESD HBM | | | | 2 | KV | HBM | 4 |
| ESD MM | | | | 200 | V | MM | 4 |
| Package Thermal Resistance SOT-89-3 | θJA | | | 120 | oC /W | SOT-89-3; TA=25°C, DSTECH EVB board (Note 2) | 4 |
| Input Voltage (recommended) | VIN | 2.5 | | 36 | V | | 4 |
| Junction Temperature Range (recommended) | | -40 | | 125 | oC | | 4 |
| Ambient Temperature Range (recommended) | | -40 | | 85 | oC | | 4 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | | must be back to the DS8402 ground pin using as wide and as short of a copper trace as is practical. | 9 |
## CAD (KiCad official)
- Symbol: `DS8402-50A3L`
- Footprint: `Package_TO_SOT_SMD:SOT-89-3`
- 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files: `ds8402-50a3l-etched.step` / `ds8402-50a3l-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ds8402-50a3l.step` / `ds8402-50a3l.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [DSTECH datasheet](docs/ds8402-50a3l-datasheet.pdf) (13 pp, sha256 `920d1bd86b5963da`, retrieved 2026-11-05, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ds8402-50a3l-datasheet.pdf)