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DS8402-33S3

Public Made by Adom

by adom

DSTECH Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DS8402-33S3

DSTECH · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-3

DS8402-33S3 from DSTECH, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference for the regulator; the input and output capacitors must return to this pin through as wide and as short a copper trace as is practical.
2 VOUT power_out Regulated output of the DS8402-33 (fixed 3.3V), limited to 350mA typical current limit and stable with a 1µF to 22µF output capacitor of at least 1mΩ ESR.
3 VIN power_in Supply input with a recommended range of 2.5V to 36V; place an input capacitor of 1µF or larger close to the VIN and GND pins.

Key specifications

Parameter Value
Manufacturer DSTECH
Package SOT-23-3
Category Power Management (PMIC)
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VIN 2.5 36 V 5
DC Output Voltage Accuracy -1 1 % ILOAD =0.1mA 5
Dropout Voltage (VOUT = 3.3V) VDROP_3.3V 0.38 V ILOAD =100mA, VOUT = 3.3V 5
Line Regulation ΔLINE 0.8 % ILOAD =1mA, 10V ≤ VIN ≤ 20V 5
Load Regulation ΔLOAD 0.5 % 10mA≤ ILOAD ≤ 0.1A 5
Output Current Limit ILIM 201 350 mA VOUT =0V 5
Input Voltage (recommended operating) VIN 2.5 36 V 4
Junction Temperature Range TJ -40 125 °C 4
Ambient Temperature Range TA -40 85 °C 4
VIN to GND VIN -0.3 40 V 4
VOUT to GND VOUT -0.3 14 V 4
VOUT to VIN VOUT-VIN -40 0.3 V 4
Lead Temperature (Soldering, 10 sec.) 260 oC Soldering, 10 sec. 4
Junction Temperature TJ 150 oC 4
Storage Temperature Range TSTG -40 150 oC 4
ESD HBM 2 KV HBM 4
ESD MM 200 V MM 4
Package Thermal Resistance, SOT-23-3 θJA 220 oC /W SOT-23-5, SOT-23-3; TA=25°C on DSTECH EVB board 4
Quiescent (Ground) Current IQ 2 μA ILOAD = 0mA, VOUT ≤ 5V 5
Thermal Shutdown Temperature TSD 160 °C ILOAD =10mA 5
Thermal Shutdown Hysteresis ΔTSD 30 °C 5
Power Supply Rejection Ratio PSRR 70 dB VOUT =3.3V, ILOAD =30mA, VIN = 12V, f = 1KHz 5
Input Capacitor 1 μF Input capacitor placed close to VIN and GND pins 8
Output Capacitor Effective Capacitance 1 22 μF 8
Output Capacitor ESR ESR 1 mΩ Minimum ESR for output capacitor 8

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper must be back to the DS8402 ground pin using as wide and as short of a copper trace as is practical. 9

CAD (KiCad official)

  • Symbol: DS8402-33S3
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT-23-3 (KiCad packages3D, STEP)
  • 3D model files: ds8402-33s3-etched.step / ds8402-33s3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ds8402-33s3.step / ds8402-33s3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: DSTECH datasheet (13 pp, sha256 920d1bd86b5963da, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF