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DS6521AFF8

Public Made by Adom

by adom

DSTECH Battery Management, SOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DS6521AFF8

DSTECH · Battery Management · SOP-8-EP

DS6521AFF8 from DSTECH, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TS input Connects to the battery pack NTC thermistor (10 kΩ or 100 kΩ at 25 °C) for temperature sensing; tie TS directly to GND if temperature detection is not needed.
2 ISET input Programs the fast-charge current: an external resistor from ISET to GND sets ICHG = VISET / RISET × 1000 with VISET = 1 V, and the programmable range is 50 mA to 1 A.
3 VIN power_in Input supply pin, recommended operating range 4.5 V to 24 V, with 6 V input overvoltage protection and a 28 V input rating.
4 VCC power_out Internal regulator output; a 0.1 µF to 1 µF capacitor to ground is recommended.
5 BAT power_out Connects to the battery, which may also connect the system load; a bypass capacitor of 10 µF to 22 µF is recommended.
6 CHG output Charge status output: low (FET on) indicates charging, and open (FET off) indicates no charging or charge complete.
7 EN input Chip enable with 1.5 V rising and 0.4 V falling thresholds; at EN = 0 V the standby current IQS is 80 µA maximum at VIN = 5 V.
8 GND power_in Ground reference for the device.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer DSTECH
Package SOP-8-EP
Category Power Management (PMIC)
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage VIN 4.5 24 V 5
Battery output voltage, Type A (4.2V) VBAT 4.16 4.2 4.24 V ICHG = 25mA 5
Fast charge current tolerance, ICHG > 100mA -10 10 % ICHG > 100mA 5
Fast charge current tolerance, ICHG < 100mA -10 10 mA ICHG < 100mA 5
Input voltage (recommended operating) VIN 4.5 24 V 4
Application junction temperature range -40 125 oC 4
Application ambient temperature range -40 85 oC 4
VIN / EN / CHG / TEM to GND -0.3 28 V 4
BAT to GND -0.3 15 V 4
Other to GND -0.3 6 V 4
Junction temperature 150 oC 4
Storage temperature range -60 150 oC 4
Lead soldering temperature 260 oC 10 sec. 4
ESD HBM 2 KV 4
ESD MM 200 V 4
Thermal resistance junction-to-ambient, ESOP-8 θJA 75 oC /W TA = 25°C, DSTECH EVB board (Note 2) 4

CAD (KiCad official)

  • Symbol: DS6521AFF8
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • 3D model: SOP-8-EP (KiCad packages3D, STEP)
  • 3D model files: ds6521aff8-etched.step / ds6521aff8-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ds6521aff8.step / ds6521aff8.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: DSTECH datasheet (15 pp, sha256 e4ba68fabe077547, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF