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DS4520E+

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Analog Devices Inc Maxim Integrated I/O Expanders, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DS4520E+

Analog Devices Inc Maxim Integrated · I/O Expanders · TSSOP-16

DS4520E+ from Analog Devices Inc Maxim Integrated, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I/O_0 bidirectional Bidirectional I/O pin with an open-drain output that can sink up to 12mA and a selectable internal pullup.
2 I/O_1 bidirectional Bidirectional I/O pin with an open-drain output that can sink up to 12mA and a selectable internal pullup.
3 I/O_2 bidirectional Bidirectional I/O pin with an open-drain output that can sink up to 12mA and a selectable internal pullup.
4 I/O_3 bidirectional Bidirectional I/O pin with an open-drain output that can sink up to 12mA and a selectable internal pullup.
5 I/O_4 bidirectional Bidirectional I/O pin with an open-drain output that can sink up to 12mA and a selectable internal pullup.
6 A0 input I2C address input; A0, A1, and A2 determine the I2C slave address, with GND giving 0 and VCC giving 1 in each bit position.
7 A1 input I2C address input; A0, A1, and A2 determine the I2C slave address, with GND giving 0 and VCC giving 1 in each bit position.
8 VCC power_in Power supply voltage, specified from +2.7V to +5.5V.
9 SDA bidirectional I2C serial data open-drain input/output.
10 SCL input I2C serial clock input, specified for clock frequencies from 0 to 400kHz.
11 A2 input I2C address input; A0, A1, and A2 determine the I2C slave address, with GND giving 0 and VCC giving 1 in each bit position.
12 I/O_5 bidirectional Bidirectional I/O pin with an open-drain output that can sink up to 12mA and a selectable internal pullup.
13 I/O_6 bidirectional Bidirectional I/O pin with an open-drain output that can sink up to 12mA and a selectable internal pullup.
14 I/O_7 bidirectional Bidirectional I/O pin with an open-drain output that can sink up to 12mA and a selectable internal pullup.
15 I/O_8 bidirectional Bidirectional I/O pin with an open-drain output that can sink up to 12mA and a selectable internal pullup.
16 GND power_in Ground reference for the device.

Key specifications

Parameter Value
Manufacturer Analog Devices Inc Maxim Integrated
Package TSSOP-16
Category Interface
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VCC 2.7 5.5 V (Note 1) 2
Voltage on VCC, SDA, and SCL Pins Relative to Ground -0.5 6 V 2
Voltage on A0, A1, A2, and I/O_n Relative to Ground -0.5 6 V (VCC + 0.5V) not to exceed +6.0V 2
Operating Temperature Range -40 85 °C 2
EEPROM Programming Temperature Range 0 70 °C 2
Storage Temperature Range -55 125 °C 2
Input Logic 0 VIL -0.3 V 2
Input Leakage IL -1 1 µA 2
Input Current each I/O Pin II/O -1 1 µA 0.4V < VI/O < 0.9VCC (Note 3) 2
Low-Level Output Voltage (SDA) VOL 0 0.4 V 3mA sink current 2
Low-Level Output Voltage (SDA) VOL 0 0.6 V 6mA sink current 2
Standby Current ISTBY 2 10 µA (Note 2) 2
I/O Pin Pullup Resistors RPU 4 5.5 7.5 kΩ 2
I/O Capacitance CI/O 10 pF (Note 4) 2
SCL Clock Frequency fSCL 0 400 kHz (Note 5) 3
Bus Free Time Between Stop and Start Conditions tBUF 1.3 µs 3
Hold Time (Repeated) Start Condition tHD:STA 0.6 µs 3
Low Period of SCL tLOW 1.3 µs 3
High Period of SCL tHIGH 0.6 µs 3
Data Hold Time tHD:DAT 0 0.9 µs 3
Data Setup Time tSU:DAT 100 ns 3
Start Setup Time tSU:STA 0.6 µs 3
SDA and SCL Rise Time tR 300 ns (Note 6) 3
SDA and SCL Fall Time tF 300 ns (Note 6) 3
Stop Setup Time tSU:STO 0.6 µs 3
SDA and SCL Capacitive Loading CB 400 pF (Note 6) 3
EEPROM Write Time tWR 10 20 ms (Note 7) 3
EEPROM Writes 50000 +70°C (Note 4) 3

CAD (KiCad official)

  • Symbol: DS4520E+
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: ds4520e-etched.step / ds4520e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ds4520e.step / ds4520e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices Inc Maxim Integrated datasheet (11 pp, sha256 7a03872d5183fb98, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF