main
Ray Set visibility: public 0c8086a 12d ago
{
  "schema_version": 1,
  "type": "component",
  "slug": "ds25cp114tsqx",
  "title": "DS25CP114TSQX",
  "brief": "Texas Instruments Signal Switches, Multiplexers, Decoders, VQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "ds25cp114tsqx",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "DS25CP114TSQX",
    "manufacturer": "Texas Instruments",
    "package": "VQFN-40-EP(6x6)",
    "pin_count": 41,
    "category": "Logic",
    "subcategory": "Signal Switches, Multiplexers, Decoders",
    "datasheet": "https://www.ti.com/cn/lit/gpn/ds25cp104a",
    "parts": {
      "symbol": "ds25cp114tsqx.kicad_sym",
      "footprint": "ds25cp114tsqx.kicad_mod",
      "model_3d": "ds25cp114tsqx-hero.glb",
      "model_3d_plain": "ds25cp114tsqx.glb",
      "model_3d_step": "ds25cp114tsqx-etched.step",
      "model_3d_step_plain": "ds25cp114tsqx.step",
      "lbr": "ds25cp114tsqx.lbr"
    },
    "distributor_links": {
      "lcsc": "C2674976"
    },
    "distributor_check": {
      "checked_at": "2026-10-11T00:01:04Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "IN0+",
        "type": "input",
        "description": "Non-inverting high-speed LVDS input; the DS25CP114 has no internal 100 Ω input termination, so it must be terminated externally."
      },
      {
        "number": "2",
        "name": "IN0-",
        "type": "input",
        "description": "Inverting high-speed LVDS input; the DS25CP114 has no internal 100 Ω input termination, so it must be terminated externally."
      },
      {
        "number": "3",
        "name": "VDD",
        "type": "power_in",
        "description": "Power supply pin; recommended supply voltage is 3.0 V to 3.6 V (3.3 V typical)."
      },
      {
        "number": "4",
        "name": "IN1+",
        "type": "input",
        "description": "Non-inverting high-speed LVDS input; the DS25CP114 has no internal 100 Ω input termination, so it must be terminated externally."
      },
      {
        "number": "5",
        "name": "IN1-",
        "type": "input",
        "description": "Inverting high-speed LVDS input; the DS25CP114 has no internal 100 Ω input termination, so it must be terminated externally."
      },
      {
        "number": "6",
        "name": "IN2+",
        "type": "input",
        "description": "Non-inverting high-speed LVDS input; the DS25CP114 has no internal 100 Ω input termination, so it must be terminated externally."
      },
      {
        "number": "7",
        "name": "IN2-",
        "type": "input",
        "description": "Inverting high-speed LVDS input; the DS25CP114 has no internal 100 Ω input termination, so it must be terminated externally."
      },
      {
        "number": "8",
        "name": "VDD",
        "type": "power_in",
        "description": "Power supply pin; recommended supply voltage is 3.0 V to 3.6 V (3.3 V typical)."
      },
      {
        "number": "9",
        "name": "IN3+",
        "type": "input",
        "description": "Non-inverting high-speed LVDS input; the DS25CP114 has no internal 100 Ω input termination, so it must be terminated externally."
      },
      {
        "number": "10",
        "name": "IN3-",
        "type": "input",
        "description": "Inverting high-speed LVDS input; the DS25CP114 has no internal 100 Ω input termination, so it must be terminated externally."
      },
      {
        "number": "11",
        "name": "EQ2",
        "type": "input",
        "description": "LVCMOS receive equalization level select for channel 2, functional regardless of EN_smb state."
      },
      {
        "number": "12",
        "name": "EQ3",
        "type": "input",
        "description": "LVCMOS receive equalization level select for channel 3, functional regardless of EN_smb state."
      },
      {
        "number": "13",
        "name": "S30",
        "type": "input",
        "description": "LVCMOS input selecting which LVDS input routes to OUT3 when EN_smb = 0; non-functional in SMBus mode and must be tied high or low."
      },
      {
        "number": "14",
        "name": "S31",
        "type": "input",
        "description": "LVCMOS input selecting which LVDS input routes to OUT3 when EN_smb = 0; non-functional in SMBus mode and must be tied high or low."
      },
      {
        "number": "15",
        "name": "VDD",
        "type": "power_in",
        "description": "Power supply pin; recommended supply voltage is 3.0 V to 3.6 V (3.3 V typical)."
      },
      {
        "number": "16",
        "name": "GND",
        "type": "power_in",
        "description": "Power ground pin; the center DAP must also be connected to GND for optimum electrical and thermal performance."
      },
      {
        "number": "17",
        "name": "EN_smb",
        "type": "input",
        "description": "LVCMOS SMBus enable with internal 20 kΩ pull-down; setting it to 1 selects SMBus mode, and all SMBus registers reset when this pin is toggled."
      },
      {
        "number": "18",
        "name": "PE3",
        "type": "input",
        "description": "LVCMOS transmit pre-emphasis level select for channel 3, functional regardless of EN_smb state."
      },
      {
        "number": "19",
        "name": "PE2",
        "type": "input",
        "description": "LVCMOS transmit pre-emphasis level select for channel 2, functional regardless of EN_smb state."
      },
      {
        "number": "20",
        "name": "PE1",
        "type": "input",
        "description": "LVCMOS transmit pre-emphasis level select for channel 1, functional regardless of EN_smb state."
      },
      {
        "number": "21",
        "name": "OUT3-",
        "type": "output",
        "description": "Inverting LVDS output with internal 100 Ω termination to improve return loss."
      },
      {
        "number": "22",
        "name": "OUT3+",
        "type": "output",
        "description": "Non-inverting LVDS output with internal 100 Ω termination to improve return loss."
      },
      {
        "number": "23",
        "name": "OUT2-",
        "type": "output",
        "description": "Inverting LVDS output with internal 100 Ω termination to improve return loss."
      },
      {
        "number": "24",
        "name": "OUT2+",
        "type": "output",
        "description": "Non-inverting LVDS output with internal 100 Ω termination to improve return loss."
      },
      {
        "number": "25",
        "name": "VDD",
        "type": "power_in",
        "description": "Power supply pin; recommended supply voltage is 3.0 V to 3.6 V (3.3 V typical)."
      },
      {
        "number": "26",
        "name": "OUT1-",
        "type": "output",
        "description": "Inverting LVDS output with internal 100 Ω termination to improve return loss."
      },
      {
        "number": "27",
        "name": "OUT1+",
        "type": "output",
        "description": "Non-inverting LVDS output with internal 100 Ω termination to improve return loss."
      },
      {
        "number": "28",
        "name": "OUT0-",
        "type": "output",
        "description": "Inverting LVDS output with internal 100 Ω termination to improve return loss."
      },
      {
        "number": "29",
        "name": "OUT0+",
        "type": "output",
        "description": "Non-inverting LVDS output with internal 100 Ω termination to improve return loss."
      },
      {
        "number": "30",
        "name": "VDD",
        "type": "power_in",
        "description": "Power supply pin; recommended supply voltage is 3.0 V to 3.6 V (3.3 V typical)."
      },
      {
        "number": "31",
        "name": "PE0",
        "type": "input",
        "description": "LVCMOS transmit pre-emphasis level select for channel 0, functional regardless of EN_smb state."
      },
      {
        "number": "32",
        "name": "S21/ADDR3",
        "type": "input",
        "description": "LVCMOS input selecting the OUT2 source when EN_smb = 0; in SMBus mode it is the user-set SMBus slave address bit 3."
      },
      {
        "number": "33",
        "name": "S20/ADDR2",
        "type": "input",
        "description": "LVCMOS input selecting the OUT2 source when EN_smb = 0; in SMBus mode it is the user-set SMBus slave address bit 2."
      },
      {
        "number": "34",
        "name": "S11/ADDR1",
        "type": "input",
        "description": "LVCMOS input selecting the OUT1 source when EN_smb = 0; in SMBus mode it is the user-set SMBus slave address bit 1."
      },
      {
        "number": "35",
        "name": "S10/ADDR0",
        "type": "input",
        "description": "LVCMOS input selecting the OUT1 source when EN_smb = 0; in SMBus mode it is the user-set SMBus slave address bit 0."
      },
      {
        "number": "36",
        "name": "S01/SDA",
        "type": "bidirectional",
        "description": "LVCMOS input selecting the OUT0 source when EN_smb = 0; in SMBus mode it is the SMBus data pin."
      },
      {
        "number": "37",
        "name": "S00/SCL",
        "type": "input",
        "description": "LVCMOS input selecting the OUT0 source when EN_smb = 0; in SMBus mode it is the SMBus clock input."
      },
      {
        "number": "38",
        "name": "PWDN",
        "type": "input",
        "description": "LVCMOS power-down pin when EN_smb = 0: low powers the device down and high powers it up; in SMBus mode power is also controlled by Control Register D[7] (SoftPWDN)."
      },
      {
        "number": "39",
        "name": "EQ1",
        "type": "input",
        "description": "LVCMOS receive equalization level select for channel 1, functional regardless of EN_smb state."
      },
      {
        "number": "40",
        "name": "EQ0",
        "type": "input",
        "description": "LVCMOS receive equalization level select for channel 0, functional regardless of EN_smb state."
      },
      {
        "number": "41",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Package naming differs from the hint. The datasheet and ordering table call this package WQFN (RTA),; The DAP has no numeric pin number on the datasheet. It is listed as 'DAP' and is not numbered 41, so; The pin diagram text on page 3 is garbled in extraction. The pin-to-number mapping was reconstructed",
          "exposed pad 41 added from the footprint",
          "dropped thermal pad ['EP'] absent from footprint"
        ],
        "pages_sent": 9,
        "cost_usd": 0.0828,
        "at": "2026-10-11T00:00:49"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/ds25cp104a",
        "pages": 31,
        "sha256": "7bf748a9e0082456",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 41,
        "described": 41,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ds25cp114tsqx.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          6,
          1
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "e5b4286c2329085d9ef7f90d5eb5bf41a435241ecc1baaf1383823b6d6a946ae",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ds25cp114tsqx-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          6,
          1
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "feed229530396fd39c82c01ae0c8086b4359e50ef6d12fadb80d97cfce84319b",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "VQFN-40-EP(6x6)",
      "Category": "Logic",
      "Pins": "41"
    }
  },
  "variants": [],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "ds25cp114tsqx"
  ],
  "discovery_pitch": "DS25CP114TSQX (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ds25cp114tsqx.kicad_sym",
    "ds25cp114tsqx.kicad_mod",
    "ds25cp114tsqx.glb",
    "ds25cp114tsqx.step",
    "ds25cp114tsqx.lbr",
    "docs/hero.png",
    "docs/ds25cp114tsqx-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ds25cp114tsqx-hero.glb",
    "ds25cp114tsqx-hero.overlay.json"
  ],
  "visibility": {
    "public": true
  }
}