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DS25BR110TSDX

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Texas Instruments LVDS ICs, WSON-8-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterfaceds25br110tsdxfactory-2.0.0extractor-text

Verified DS25BR110TSDX

by Ray · last 11 Nov 2026 · 2 records · files match
SymbolFootprint3D modelPins

Verification log 2 records

11 Nov 2026RayRebuilt by the parts factory: tier mfr, 9 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: DS25BR110TSDX · WSON-8-EP(3x3) · 9 pins
  • ✓copper: 9 copper pads, none touching another net
  • ✓datasheet: all 9 pin names found in the 21-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: WSON-8-1EP_3x3mm_P0.5mm_EP1.6x2.0mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-o8jf2ghc/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height within the datasheet's package drawing (datasheet p.18)
  • ✓pads: 9 pins = 9 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 9 pins agree
  • ✓symbol_text: no pin names collide
  • ✓viewers: viewers/footprint.html 20 kB, viewers/symbol.html 10 kB
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ds25br110tsdx.kicad_sym✓ ds25br110tsdx.kicad_mod✓ ds25br110tsdx.step
9 Nov 2026RayPublished by the parts factory: tier mfr, 9 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: DS25BR110TSDX · WSON-8-EP(3x3) · 9 pins
  • ✓copper: 9 copper pads, none touching another net
  • ✓datasheet: all 9 pin names found in the 21-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: WSON-8-1EP_3x3mm_P0.5mm_EP1.6x2.0mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-6obkid78/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 9 pins = 9 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 9 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ds25br110tsdx.kicad_sym✓ ds25br110tsdx.kicad_mod✓ ds25br110tsdx.step
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Contents

README

markdown

DS25BR110TSDX

Texas Instruments · LVDS ICs · WSON-8-EP(3x3)

DS25BR110TSDX from Texas Instruments, in a WSON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 EQ0 input Equalizer select pin (LVCMOS input, VIH 2.0V min, VIL 0.8V max) that together with EQ1 sets Off/Low/Medium/High receive equalization.
2 IN+ input Non-inverting LVDS input with internal 100Ω termination to IN-, common mode range 0.05V to VCC-0.05V.
3 IN- input Inverting LVDS input with internal 100Ω termination to IN+, common mode range 0.05V to VCC-0.05V.
4 EQ1 input Equalizer select pin (LVCMOS input, VIH 2.0V min, VIL 0.8V max) that together with EQ0 sets Off/Low/Medium/High receive equalization.
5 NC unconnected No connect pin.
6 OUT- output Inverting LVDS output with internal 100Ω termination, VOD 250 to 450 mV.
7 OUT+ output Non-inverting LVDS output with internal 100Ω termination, VOD 250 to 450 mV.
8 VCC power_in Power supply pin, 3.0V to 3.6V recommended operating range (3.3V typical).
9 GND power_in Ground exposed die attach pad (DAP), which must be soldered to the board for thermal and mechanical performance.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-8-EP(3x3)
Category Interface
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage (VCC) VCC -0.3 4 V 3
LVCMOS Input Voltage (EQ0, EQ1), max printed as VCC + 0.3V -0.3 V 3
LVDS Input Voltage (IN+, IN-) -0.3 4 V 3
Differential Input Voltage /VID/ /VID/ 1 V 3
LVDS Output Voltage (OUT+, OUT-), max printed as VCC + 0.3V -0.3 V 3
LVDS Differential Output Voltage ((OUT+) - (OUT-)) 0 1 V 3
LVDS Output Short Circuit Current Duration 5 ms 3
Junction Temperature 150 °C 3
Storage Temperature Range -65 150 °C 3
Lead Temperature Range Soldering 260 °C Soldering, 4 sec. 3
Maximum Package Power Dissipation at NGQ0008A Package 2.08 W 3
ESD Susceptibility HBM 7 kV Human Body Model, JESD22-A114C 3
Supply Voltage (VCC) VCC 3 3.3 3.6 V 3
Operating Free Air Temperature (TA) TA -40 25 85 °C 3
High Level Input Voltage (EQ0, EQ1), max printed as VCC VIH 2 V 4
Low Level Input Voltage (EQ0, EQ1), min printed as GND VIL 0.8 V 4
High Level Input Current IIH -10 0 10 μA VIN = 3.6V, VCC = 3.6V 4
Low Level Input Current IIL -10 0 10 μA VIN = GND, VCC = 3.6V 4
Input Clamp Voltage VCL -0.9 -1.5 V ICL = −18 mA, VCC = 0V 4
Differential Output Voltage VOD 250 350 450 mV 4
Change in Magnitude of VOD for Complimentary Output States ΔVOD -35 35 mV RL = 100Ω 4
Offset Voltage VOS 1.05 1.2 1.375 V 4
Change in Magnitude of VOS for Complimentary Output States ΔVOS -35 35 mV RL = 100Ω 4
Output Short Circuit Current, OUT to GND IOS -35 -55 mA OUT to GND 4
Output Short Circuit Current, OUT to VCC IOS 7 55 mA OUT to VCC 4
Input Differential Voltage VID 0 1 V 4
Differential Input High Threshold VTH 0 100 mV VCM = +0.05V or VCC-0.05V 4
Differential Input Low Threshold VTL -100 0 mV 4
Common Mode Voltage Range, max printed as VCC - 0.05 VCMR 0.05 V VID = 100 mV 4
Input Current IIN -10 1 10 μA VIN = 3.6V or 0V, VCC = 3.6V or 0V 4
Supply Current ICC 35 43 mA EQ0 = 0, EQ1 = 0 4
Differential Propagation Delay High to Low tPHLD 350 465 ps RL = 100Ω 5
Differential Propagation Delay Low to High tPLHD 350 465 ps RL = 100Ω 5
Pulse Skew /tPLHD − tPHLD/ tSKD1 45 100 ps 5
Part to Part Skew tSKD2 45 150 ps 5
Rise Time tLHT 80 150 ps RL = 100Ω 5
Fall Time tHLT 80 150 ps RL = 100Ω 5
Random Jitter (RMS Value) tRJ1A 0.5 1 ps EQ = OFF; VID = 350 mV; VCM = 1.2V; 2.5 Gbps 5
Deterministic Jitter (Peak to Peak) tDJ1A 11 40 ps EQ = OFF; VID = 350 mV; VCM = 1.2V; 2.5 Gbps 5
Deterministic Jitter (Peak to Peak) tDJ2A 11 47 ps EQ = OFF; No Test Channels; K28.5 (NRZ); 3.125 Gbps 5
Total Jitter (Peak to Peak) tTJ1A 0.05 0.16 UIP-P EQ = OFF; VID = 350 mV; VCM = 1.2V; 2.5 Gbps 5
Total Jitter (Peak to Peak) tTJ2A 0.08 0.2 UIP-P EQ = OFF; No Test Channels; PRBS-23 (NRZ); 3.125 Gbps 5
Deterministic Jitter (Peak to Peak) tDJ1B 1 16 ps EQ = LOW; VID = 350 mV; VCM = 1.2V; 2.5 Gbps 5
Deterministic Jitter (Peak to Peak) tDJ2B 11 31 ps EQ = LOW; Test Channel D; K28.5 (NRZ); 3.125 Gbps 5
Total Jitter (Peak to Peak) tTJ1B 0.03 0.09 UIP-P EQ = LOW; VID = 350 mV; VCM = 1.2V; 2.5 Gbps 5
Total Jitter (Peak to Peak) tTJ2B 0.06 0.14 UIP-P EQ = LOW; Test Channel D; PRBS-23 (NRZ); 3.125 Gbps 5
Deterministic Jitter (Peak to Peak) tDJ1C 10 29 ps EQ = MEDIUM; VID = 350 mV; VCM = 1.2V; 2.5 Gbps 5
Deterministic Jitter (Peak to Peak) tDJ2C 27 43 ps EQ = MEDIUM; Test Channel E; K28.5 (NRZ); 3.125 Gbps 5
Total Jitter (Peak to Peak) tTJ1C 0.07 0.12 UIP-P EQ = MEDIUM; VID = 350 mV; VCM = 1.2V; 2.5 Gbps 6
Total Jitter (Peak to Peak) tTJ2C 0.12 0.17 UIP-P EQ = MEDIUM; Test Channel E; PRBS-23 (NRZ); 3.125 Gbps 6
Random Jitter (RMS Value) tRJ1D 1.6 2.1 ps EQ = HIGH; VID = 350 mV; VCM = 1.2V; 2.5 Gbps 6
Deterministic Jitter (Peak to Peak) tDJ1D 30 45 ps EQ = HIGH; VID = 350 mV; VCM = 1.2V; 2.5 Gbps 6
Deterministic Jitter (Peak to Peak) tDJ2D 43 59 ps EQ = HIGH; Test Channel F; K28.5 (NRZ); 3.125 Gbps 6
Total Jitter (Peak to Peak) tTJ1D 0.14 0.27 UIP-P EQ = HIGH; VID = 350 mV; VCM = 1.2V; 2.5 Gbps 6
Total Jitter (Peak to Peak) tTJ2D 0.19 0.28 UIP-P EQ = HIGH; Test Channel F; PRBS-23 (NRZ); 3.125 Gbps 6
Input Capacitance (any LVDS input pin to GND) CIN 1.7 pF Any LVDS Input Pin to GND 4
Package Thermal Resistance, junction to ambient θJA 60 °C/W 3
Package Thermal Resistance, junction to case θJC 12.3 °C/W 3

CAD (KiCad official)

  • Symbol: DS25BR110TSDX
  • Footprint: Package_SON:WSON-8-1EP_3x3mm_P0.5mm_EP1.6x2.0mm
  • 3D model: WSON-8-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: ds25br110tsdx-etched.step / ds25br110tsdx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ds25br110tsdx.step / ds25br110tsdx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (21 pp, sha256 9154aabe2fa293a3, retrieved 2026-11-11, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF