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DS2460S+T&R

Public Made by Adom

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Analog Devices Inc Maxim Integrated EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DS2460S+T&R

Analog Devices Inc Maxim Integrated · EEPROM · SOIC-8

DS2460S+T&R from Analog Devices Inc Maxim Integrated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AD0 input I²C address input that must be tied to VCC or GND; its logic state sets the device's slave address bit A0.
2 AD1 input I²C address input that must be tied to VCC or GND; its logic state sets the device's slave address bit A2.
3 AD2 input I²C address input that must be tied to VCC or GND; its logic state sets the device's slave address bit A4.
4 GND power_in Ground reference for the device.
5 NC unconnected Not connected internally.
6 SDA bidirectional I²C serial data input/output, an open-drain output that must be tied to VCC through a pullup resistor.
7 SCL input I²C serial clock input, used as input only (no clock stretching), that must be tied to VCC through a pullup resistor.
8 VCC power_in Power supply input; the specified supply range is 2.7 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Analog Devices Inc Maxim Integrated
Package SOIC-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VCC 2.7 5.5 V 2
Standby Current ICCS 1 µA Bus idle, +25°C 2
Operating Current ICCA 250 500 µA Bus active at 400kHz 2
Programming Current IPROG 500 1000 µA 2
EEPROM Programming Time tPROG 10 ms 2
Endurance NCYCLE 200 k cycles At +25°C (Notes 2, 3) 2
Data Retention tRET 40 years At +85°C (Notes 4, 5, 6) 2
LOW Level Input Voltage VIL -0.5 V (Note 8) 2
LOW Level Output Voltage VOL 0.4 V at 4mA sink current 2
Output Fall Time from VIHmin to VILmax tof 250 ns Bus capacitance from 10pF to 400pF (Note 9) 2
Pulse Width of Spikes Suppressed by Input Filter tSP 50 ns SDA and SCL pins only (Note 9) 2
Input Current Each I/O Pin Ii -10 10 µA Input voltage between 0.1VCCmax and 0.9VCCmax (Notes 8, 10) 2
Input Capacitance Ci 10 pF (Notes 8, 9) 2
SCL Clock Frequency fSCL 0 400 kHz 2
Hold Time (Repeated) START Condition tHD:STA 0.6 µs 2
LOW Period of the SCL Clock tLOW 1.3 µs 2
HIGH Period of the SCL Clock tHIGH 0.6 µs 2
Setup Time for a Repeated START Condition tSU:STA 0.6 µs 3
Data Hold Time tHD:DAT 0.9 µs (Notes 11, 12) 3
Data Setup Time tSU:DAT 100 ns (Note 13) 3
Setup Time for STOP Condition tSU:STO 0.6 µs 3
Bus Free Time Between STOP and START Condition tBUF 1.3 µs 3
Capacitive Load for Each Bus Line CB 400 pF (Note 14) 3
Voltage Range on Any Pin Relative to Ground -0.5 6 V Relative to ground 2
Maximum Current Into Any Pin -20 20 mA 2
Operating Temperature Range -40 85 °C 2
Junction Temperature 150 °C 2
Storage Temperature Range -55 125 °C 2
Lead Temperature 300 °C Soldering 10s 2
Soldering Temperature (Reflow) 260 °C 2

CAD (KiCad official)

  • Symbol: DS2460S+T&R
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ds2460s-t-r-etched.step / ds2460s-t-r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ds2460s-t-r.step / ds2460s-t-r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices Inc Maxim Integrated datasheet (9 pp, sha256 f26b2f35af492bd9, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF