component
DS1722S+T&R
Public Made by Adomby adom
Maxim Integrated Temperature Sensors, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DS1722S+T&R
Maxim Integrated · Temperature Sensors · SO-8
DS1722S+T&R from Maxim Integrated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDDD | power_in | Digital supply voltage of 1.8V to 5.5V that defines the logic-level rails for the digital inputs and outputs. |
| 2 | CE | input | Chip Enable, which must be asserted high for communication to take place over either the SPI or 3-wire interface. |
| 3 | SCLK | input | Serial clock input that synchronizes data movement on the serial interface for either the SPI or 3-wire interface. |
| 4 | GND | power_in | Ground pin. |
| 5 | SDO | output | Serial data output for the SPI bus when SPI is selected; in 3-wire mode it must be tied to SDI so the two pins act as a single I/O pin. |
| 6 | SDI | input | Serial data input for the SPI bus when SPI is selected; in 3-wire mode it must be tied to SDO so the two pins act as a single I/O pin. |
| 7 | SERMODE | input | Serial interface mode select: connect to VDDD for SPI, or to GND for standard 3-wire interface. |
| 8 | VDDA | power_in | Analog supply voltage input of 2.65V to 5.5V that powers the device. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Maxim Integrated |
| Package | SO-8 |
| Category | Sensors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Analog Supply Voltage | VDDA | 2.65 | 5.5 | V | 10 | ||
| Digital Supply Voltage | VDDD | 1.8 | 5.5 | V | 10 | ||
| Voltage on VDD, Relative to Ground | VDD | -0.3 | 6 | V | 10 | ||
| Voltage on any other pin, Relative to Ground | -0.3 | 6 | V | 10 | |||
| Operating Temperature | -55 | 125 | °C | 10 | |||
| Storage Temperature | -55 | 125 | °C | 10 | |||
| Soldering Temperature | 260 | °C | for 10 seconds | 10 | |||
| Input Logic High | VIH | 0.7 | x VDDD | 10 | |||
| Input Logic Low | VIL | 0.2 | x VDDD | 10 | |||
| Logic 0 Output | VOL | 0.2 | x VDDD | sink current of 3 mA | 10 | ||
| Logic 1 Output | VOH | 0.7 | x VDDD | source current of 1 mA | 10 | ||
| Input Resistance | RI | 1 | MΩ | CE to GND | 10 | ||
| Active Current | ICC | 0.5 | mA | SCLK=VDDD and CE=GND (note 4) | 10 | ||
| Shutdown Current | ICC | 0.5 | µA | 2.65V≤VDDA≤3.3V | 10 | ||
| Shutdown Current | ICC | 1 | µA | 3.3V≤VDDA≤5.5V | 10 | ||
| Thermometer Error | TERR | -2 | 2 | °C | -40°C to +85°C | 11 | |
| Thermometer Error | TERR | -3 | 3 | °C | -55°C to +120°C | 11 | |
| Resolution | 8 | 12 | bits | 11 | |||
| Conversion Time | tCONVT | 67.5 | 75 | ms | 8-bit conversions | 11 | |
| Conversion Time | tCONVT | 125 | 150 | ms | 9-bit conversions | 11 | |
| Conversion Time | tCONVT | 250 | 300 | ms | 10-bit conversions | 11 | |
| Conversion Time | tCONVT | 500 | 600 | ms | 11-bit conversions | 11 | |
| Conversion Time | tCONVT | 1000 | 1200 | ms | 12-bit conversions | 11 | |
| 3-wire: Data to SCLK Setup | tDC | 35 | ns | 11 | |||
| 3-wire: SCLK to Data Hold | tCDH | 35 | ns | 11 | |||
| 3-wire: SCLK to Data Valid | tCDD | 80 | ns | 11 | |||
| 3-wire: SCLK Low Time | tCL | 100 | ns | 11 | |||
| 3-wire: SCLK High Time | tCH | 100 | ns | 11 | |||
| 3-wire: SCLK Frequency | tCLK | 5 | MHz | 11 | |||
| 3-wire: SCLK Rise and Fall | tR, tF | 200 | ns | 11 | |||
| 3-wire: CE to SCLK Setup | tCC | 400 | ns | 11 | |||
| 3-wire: SCLK to CE Hold | tCCH | 100 | ns | 11 | |||
| 3-wire: CE Inactive Time | tCWH | 400 | ns | 11 | |||
| 3-wire: CE to Output High Z | tCDZ | 40 | ns | 11 | |||
| 3-wire: SCLK to Output High Z | tCCZ | 40 | ns | 11 | |||
| SPI: Data to SCLK Setup | tDC | 35 | ns | 12 | |||
| SPI: SCLK to Data Hold | tCDH | 35 | ns | 12 | |||
| SPI: SCLK to Data Valid | tCDD | 80 | ns | 12 | |||
| SPI: SCLK Low Time | tCL | 100 | ns | 12 | |||
| SPI: SCLK High Time | tCH | 100 | ns | 12 | |||
| SPI: SCLK Frequency | tCLK | 5 | MHz | 12 | |||
| SPI: SCLK Rise and Fall | tR, tF | 200 | ns | 12 | |||
| SPI: CE to SCLK Setup | tCC | 400 | ns | 12 | |||
| SPI: SCLK to CE Hold | tCCH | 100 | ns | 12 | |||
| SPI: CE Inactive Time | tCWH | 400 | ns | 12 | |||
| SPI: CE to Output High Z | tCDZ | 40 | ns | 12 |
CAD (KiCad official)
- Symbol:
DS1722S+T&R - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
ds1722s-t-r-etched.step/ds1722s-t-r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ds1722s-t-r.step/ds1722s-t-r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Maxim Integrated datasheet (14 pp, sha256
3e70ab7cb434ebbf, retrieved 2026-10-29, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DS1722S+T&R
**Maxim Integrated** · Temperature Sensors · SO-8
DS1722S+T&R from Maxim Integrated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDDD | power_in | Digital supply voltage of 1.8V to 5.5V that defines the logic-level rails for the digital inputs and outputs. |
| 2 | CE | input | Chip Enable, which must be asserted high for communication to take place over either the SPI or 3-wire interface. |
| 3 | SCLK | input | Serial clock input that synchronizes data movement on the serial interface for either the SPI or 3-wire interface. |
| 4 | GND | power_in | Ground pin. |
| 5 | SDO | output | Serial data output for the SPI bus when SPI is selected; in 3-wire mode it must be tied to SDI so the two pins act as a single I/O pin. |
| 6 | SDI | input | Serial data input for the SPI bus when SPI is selected; in 3-wire mode it must be tied to SDO so the two pins act as a single I/O pin. |
| 7 | SERMODE | input | Serial interface mode select: connect to VDDD for SPI, or to GND for standard 3-wire interface. |
| 8 | VDDA | power_in | Analog supply voltage input of 2.65V to 5.5V that powers the device. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Maxim Integrated |
| Package | SO-8 |
| Category | Sensors |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Analog Supply Voltage | VDDA | 2.65 | | 5.5 | V | | 10 |
| Digital Supply Voltage | VDDD | 1.8 | | 5.5 | V | | 10 |
| Voltage on VDD, Relative to Ground | VDD | -0.3 | | 6 | V | | 10 |
| Voltage on any other pin, Relative to Ground | | -0.3 | | 6 | V | | 10 |
| Operating Temperature | | -55 | | 125 | °C | | 10 |
| Storage Temperature | | -55 | | 125 | °C | | 10 |
| Soldering Temperature | | | | 260 | °C | for 10 seconds | 10 |
| Input Logic High | VIH | 0.7 | | | x VDDD | | 10 |
| Input Logic Low | VIL | | | 0.2 | x VDDD | | 10 |
| Logic 0 Output | VOL | | | 0.2 | x VDDD | sink current of 3 mA | 10 |
| Logic 1 Output | VOH | 0.7 | | | x VDDD | source current of 1 mA | 10 |
| Input Resistance | RI | 1 | | | MΩ | CE to GND | 10 |
| Active Current | ICC | | | 0.5 | mA | SCLK=VDDD and CE=GND (note 4) | 10 |
| Shutdown Current | ICC | | | 0.5 | µA | 2.65V≤VDDA≤3.3V | 10 |
| Shutdown Current | ICC | | | 1 | µA | 3.3V≤VDDA≤5.5V | 10 |
| Thermometer Error | TERR | -2 | | 2 | °C | -40°C to +85°C | 11 |
| Thermometer Error | TERR | -3 | | 3 | °C | -55°C to +120°C | 11 |
| Resolution | | 8 | | 12 | bits | | 11 |
| Conversion Time | tCONVT | 67.5 | | 75 | ms | 8-bit conversions | 11 |
| Conversion Time | tCONVT | 125 | | 150 | ms | 9-bit conversions | 11 |
| Conversion Time | tCONVT | 250 | | 300 | ms | 10-bit conversions | 11 |
| Conversion Time | tCONVT | 500 | | 600 | ms | 11-bit conversions | 11 |
| Conversion Time | tCONVT | 1000 | | 1200 | ms | 12-bit conversions | 11 |
| 3-wire: Data to SCLK Setup | tDC | 35 | | | ns | | 11 |
| 3-wire: SCLK to Data Hold | tCDH | 35 | | | ns | | 11 |
| 3-wire: SCLK to Data Valid | tCDD | | | 80 | ns | | 11 |
| 3-wire: SCLK Low Time | tCL | 100 | | | ns | | 11 |
| 3-wire: SCLK High Time | tCH | 100 | | | ns | | 11 |
| 3-wire: SCLK Frequency | tCLK | | | 5 | MHz | | 11 |
| 3-wire: SCLK Rise and Fall | tR, tF | | | 200 | ns | | 11 |
| 3-wire: CE to SCLK Setup | tCC | 400 | | | ns | | 11 |
| 3-wire: SCLK to CE Hold | tCCH | 100 | | | ns | | 11 |
| 3-wire: CE Inactive Time | tCWH | 400 | | | ns | | 11 |
| 3-wire: CE to Output High Z | tCDZ | | | 40 | ns | | 11 |
| 3-wire: SCLK to Output High Z | tCCZ | | | 40 | ns | | 11 |
| SPI: Data to SCLK Setup | tDC | 35 | | | ns | | 12 |
| SPI: SCLK to Data Hold | tCDH | 35 | | | ns | | 12 |
| SPI: SCLK to Data Valid | tCDD | | | 80 | ns | | 12 |
| SPI: SCLK Low Time | tCL | 100 | | | ns | | 12 |
| SPI: SCLK High Time | tCH | 100 | | | ns | | 12 |
| SPI: SCLK Frequency | tCLK | | | 5 | MHz | | 12 |
| SPI: SCLK Rise and Fall | tR, tF | | | 200 | ns | | 12 |
| SPI: CE to SCLK Setup | tCC | 400 | | | ns | | 12 |
| SPI: SCLK to CE Hold | tCCH | 100 | | | ns | | 12 |
| SPI: CE Inactive Time | tCWH | 400 | | | ns | | 12 |
| SPI: CE to Output High Z | tCDZ | | | 40 | ns | | 12 |
## CAD (KiCad official)
- Symbol: `DS1722S+T&R`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `ds1722s-t-r-etched.step` / `ds1722s-t-r-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ds1722s-t-r.step` / `ds1722s-t-r.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Maxim Integrated datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/DS1722.pdf) (14 pp, sha256 `3e70ab7cb434ebbf`, retrieved 2026-10-29, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ds1722s-t-r-datasheet.pdf)