component
DS16EV5110ASQE
Public Made by Adomby adom
Texas Instruments Video Interface ICs, WQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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Ray
Publish 0.1.0
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{
"slug": "ds16ev5110asqe",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments Video Interface ICs, WQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"interface",
"ds16ev5110asqe",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
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"path": "docs/hero.png"
},
"files": [
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"ds16ev5110asqe.step",
"ds16ev5110asqe.lbr",
"docs/hero.png",
"docs/ds16ev5110asqe-datasheet.pdf",
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"ds16ev5110asqe-hero.overlay.json",
"ds16ev5110asqe-etched.glb"
],
"component": {
"mpn": "DS16EV5110ASQE",
"manufacturer": "Texas Instruments",
"package": "WQFN-48-EP(7x7)",
"pin_count": 49,
"category": "Interface",
"subcategory": "Video Interface ICs",
"datasheet": "https://www.ti.com/lit/ds/symlink/ds16ev5110a.pdf",
"parts": {
"symbol": "ds16ev5110asqe.kicad_sym",
"footprint": "ds16ev5110asqe.kicad_mod",
"model_3d": "ds16ev5110asqe-hero.glb",
"model_3d_plain": "ds16ev5110asqe-etched.glb",
"model_3d_step": "ds16ev5110asqe-etched.step",
"model_3d_step_plain": "ds16ev5110asqe.step",
"lbr": "ds16ev5110asqe.lbr"
},
"distributor_links": {
"lcsc": "C2652754",
"digikey": "DS16EV5110ASQE/NOPBTR-ND",
"mouser": "926-D16EV5110ASQENPB"
},
"distributor_check": {
"checked_at": "2026-11-10T07:31:38Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "DS16EV5110ASQE/NOPBTR-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "926-D16EV5110ASQENPB",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "C_IN-",
"type": "input",
"description": "Inverting TMDS clock input (CML) to the equalizer, with an on-chip 50Ω terminating resistor to VDD."
},
{
"number": "2",
"name": "C_IN+",
"type": "input",
"description": "Non-inverting TMDS clock input (CML) to the equalizer, with an on-chip 50Ω terminating resistor to VDD."
},
{
"number": "3",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin, tied to the VDD plane through a low-inductance path with a 0.1µF bypass capacitor to GND."
},
{
"number": "4",
"name": "D_IN0-",
"type": "input",
"description": "Inverting TMDS data channel 0 input (CML) with an on-chip 50Ω terminating resistor to VDD."
},
{
"number": "5",
"name": "D_IN0+",
"type": "input",
"description": "Non-inverting TMDS data channel 0 input (CML) with an on-chip 50Ω terminating resistor to VDD."
},
{
"number": "6",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin, tied to the VDD plane through a low-inductance path with a 0.1µF bypass capacitor to GND."
},
{
"number": "7",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin, tied to the VDD plane through a low-inductance path with a 0.1µF bypass capacitor to GND."
},
{
"number": "8",
"name": "D_IN1-",
"type": "input",
"description": "Inverting TMDS data channel 1 input (CML) with an on-chip 50Ω terminating resistor to VDD."
},
{
"number": "9",
"name": "D_IN1+",
"type": "input",
"description": "Non-inverting TMDS data channel 1 input (CML) with an on-chip 50Ω terminating resistor to VDD."
},
{
"number": "10",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin, tied to the VDD plane through a low-inductance path with a 0.1µF bypass capacitor to GND."
},
{
"number": "11",
"name": "D_IN2-",
"type": "input",
"description": "Inverting TMDS data channel 2 input (CML) with an on-chip 50Ω terminating resistor to VDD."
},
{
"number": "12",
"name": "D_IN2+",
"type": "input",
"description": "Non-inverting TMDS data channel 2 input (CML) with an on-chip 50Ω terminating resistor to VDD."
},
{
"number": "13",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin, tied to the VDD plane through a low-inductance path with a 0.1µF bypass capacitor to GND."
},
{
"number": "14",
"name": "BST_1",
"type": "input",
"description": "LVCMOS equalizer boost select bit 1 (BST_[0:2] select boost level, internally pulled Low)."
},
{
"number": "15",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin, tied to the VDD plane through a low-inductance path with a 0.1µF bypass capacitor to GND."
},
{
"number": "16",
"name": "CS",
"type": "input",
"description": "SMBus chip select: High enables the SMBus register, Low disables it; internally pulled Low and gated with SDC."
},
{
"number": "17",
"name": "SDC",
"type": "input",
"description": "SMBus clock input, 3.3V LVCMOS (not 5V tolerant), internally pulled High to 3.3V with a High-Z pull-up."
},
{
"number": "18",
"name": "SDA",
"type": "bidirectional",
"description": "SMBus data input/output, 3.3V LVCMOS (not 5V tolerant), internally pulled High to 3.3V with a High-Z pull-up."
},
{
"number": "19",
"name": "Reserv",
"type": "unconnected",
"description": "Reserved; do not connect."
},
{
"number": "20",
"name": "Reserv",
"type": "unconnected",
"description": "Reserved; do not connect."
},
{
"number": "21",
"name": "FEB",
"type": "input",
"description": "Force External Boost: High selects boost control by BST_[0:2] pins, Low selects SMBus control; internally pulled High."
},
{
"number": "22",
"name": "GND",
"type": "power_in",
"description": "Ground reference, tied to a solid ground plane through a low-impedance path."
},
{
"number": "23",
"name": "BST_0",
"type": "input",
"description": "LVCMOS equalizer boost select bit 0 (BST_[0:2] select boost level, internally pulled Low)."
},
{
"number": "24",
"name": "GND",
"type": "power_in",
"description": "Ground reference, tied to a solid ground plane through a low-impedance path."
},
{
"number": "25",
"name": "D_OUT2+",
"type": "output",
"description": "Non-inverting TMDS data channel 2 output (CML, open collector)."
},
{
"number": "26",
"name": "D_OUT2-",
"type": "output",
"description": "Inverting TMDS data channel 2 output (CML, open collector)."
},
{
"number": "27",
"name": "GND",
"type": "power_in",
"description": "Ground reference, tied to a solid ground plane through a low-impedance path."
},
{
"number": "28",
"name": "D_OUT1+",
"type": "output",
"description": "Non-inverting TMDS data channel 1 output (CML, open collector)."
},
{
"number": "29",
"name": "D_OUT1-",
"type": "output",
"description": "Inverting TMDS data channel 1 output (CML, open collector)."
},
{
"number": "30",
"name": "GND",
"type": "power_in",
"description": "Ground reference, tied to a solid ground plane through a low-impedance path."
},
{
"number": "31",
"name": "GND",
"type": "power_in",
"description": "Ground reference, tied to a solid ground plane through a low-impedance path."
},
{
"number": "32",
"name": "D_OUT0+",
"type": "output",
"description": "Non-inverting TMDS data channel 0 output (CML, open collector)."
},
{
"number": "33",
"name": "D_OUT0-",
"type": "output",
"description": "Inverting TMDS data channel 0 output (CML, open collector)."
},
{
"number": "34",
"name": "GND",
"type": "power_in",
"description": "Ground reference, tied to a solid ground plane through a low-impedance path."
},
{
"number": "35",
"name": "C_OUT+",
"type": "output",
"description": "Non-inverting TMDS clock output (CML, open collector)."
},
{
"number": "36",
"name": "C_OUT-",
"type": "output",
"description": "Inverting TMDS clock output (CML, open collector)."
},
{
"number": "37",
"name": "BST_2",
"type": "input",
"description": "LVCMOS equalizer boost select bit 2 (BST_[0:2] select boost level, internally pulled Low)."
},
{
"number": "38",
"name": "Reserv",
"type": "unconnected",
"description": "Reserved; do not connect."
},
{
"number": "39",
"name": "Reserv",
"type": "unconnected",
"description": "Reserved; do not connect."
},
{
"number": "40",
"name": "Reserv",
"type": "unconnected",
"description": "Reserved; do not connect."
},
{
"number": "41",
"name": "Reserv",
"type": "unconnected",
"description": "Reserved; do not connect."
},
{
"number": "42",
"name": "Reserv",
"type": "unconnected",
"description": "Reserved; do not connect."
},
{
"number": "43",
"name": "Reserv",
"type": "unconnected",
"description": "Reserved; do not connect."
},
{
"number": "44",
"name": "EN",
"type": "input",
"description": "Enable input, global to all channels: High selects normal operation, Low selects standby mode; internally pulled High."
},
{
"number": "45",
"name": "SD",
"type": "output",
"description": "LVCMOS clock channel signal detect output, High when a signal is detected."
},
{
"number": "46",
"name": "VDD",
"type": "power_in",
"description": "Power supply pin, tied to the VDD plane through a low-inductance path with a 0.1µF bypass capacitor to GND."
},
{
"number": "47",
"name": "Reserv",
"type": "unconnected",
"description": "Reserved; do not connect."
},
{
"number": "48",
"name": "Reserv",
"type": "unconnected",
"description": "Reserved; do not connect."
},
{
"number": "49",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The exposed pad (DAP, net GND) is not given a pin number in the datasheet and is not included in the; The top-view connection diagram on page 3 is garbled in the text extraction, so pin-to-name mapping ; The user's MPN DS16EV5110ASQE has no /NOPB suffix. The datasheet's package addendum (page 20) lists ",
"exposed pad 49 added from the footprint"
],
"pages_sent": 25,
"cost_usd": 0.137,
"at": "2026-11-10T07:31:25"
},
"datasheet": {
"url": "https://www.ti.com/lit/ds/symlink/ds16ev5110a.pdf",
"pages": 25,
"sha256": "8197f99e1a4a9be5",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 49,
"described": 49,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "ds16ev5110asqe.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.0,
7.0,
0.77
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
"checked": "2026-11-10",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ds16ev5110asqe-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.0,
7.0,
0.77
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "c34623cfc5df3dade4863777cbadbca228a0e9c31b3d885ac7e99d9a11627426",
"checked": "2026-11-10",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}