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DS1621S+T&R

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Analog Devices Inc Maxim Integrated Temperature Sensors, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DS1621S+T&R

Analog Devices Inc Maxim Integrated · Temperature Sensors · SO-8

DS1621S+T&R from Analog Devices Inc Maxim Integrated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SDA bidirectional Data input/output pin for the 2-wire serial communication port, an open-drain I/O line.
2 SCL bidirectional Clock input/output pin for the 2-wire serial communication port, an open-drain I/O line that must not obstruct the bus when VDD is switched off.
3 TOUT output Thermostat output that becomes active when temperature meets or exceeds TH and resets when temperature falls below TL; VOL is 0.4 V max at 4 mA sink and VOH is 2.4 V min at 1 mA source.
4 GND power_in Ground pin, the reference for all voltages on the device.
5 A2 input Chip address input that sets the device select bit A2 (third-least-significant bit of the slave address) to select one of eight devices.
6 A1 input Chip address input that sets the device select bit A1 (second-least-significant bit of the slave address) to select one of eight devices.
7 A0 input Chip address input that sets the device select bit A0 (least-significant bit of the slave address) to select one of eight devices.
8 VDD power_in Supply voltage input, specified from 2.7 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Analog Devices Inc Maxim Integrated
Package SO-8
Category Sensors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDD 2.7 5.5 V 13
Voltage on Any Pin Relative to Ground -0.5 6 V 13
Operating Temperature Range -55 125 °C 13
Storage Temperature Range -55 125 °C 13
Thermometer Error TERR TERR -0.5 0.5 °C 0°C to 70°C, 3.0V≤VDD≤5.5V 13
Thermometer Error TERR TERR -1 1 °C 0°C to 70°C, 2.7V≤VDD≤3.0V 13
Thermometer Error TERR TERR -2 2 °C -55°C to +0°C and 70°C to 125°C 13
Low Level Input Voltage VIL 0.5 0.3 V 13
High Level Input Voltage VIH 0.7 0.3 VDD 13
Pulse width of spikes which must be suppressed by the input filter tSP 0 50 ns Fast Mode 13
Low Level Output Voltage VOL1 0 0.4 V 3 mA sink current 13
Low Level Output Voltage VOL2 0 0.6 V 6 mA sink current 13
Input Current each I/O Pin -10 10 µA 0.4<VI/O<0.9VDD 13
Active Supply Current, Temperature Conversion ICC 1000 µA Temperature conversion, -55°C to +85°C 14
Active Supply Current, Temperature Conversion ICC 1250 µA Temperature conversion, +85°C to +125°C 14
Active Supply Current, E2 Write ICC 400 µA E2 write 14
Active Supply Current, Communication Only ICC 110 µA Communication only 14
Standby Supply Current ISTBY 1 µA 14
Thermostat Output (TOUT) Output Voltage VOH 2.4 V 1 mA source current 14
Thermostat Output (TOUT) Output Voltage VOL 0.4 V 4 mA sink current 14
Temperature Conversion Time TTC 750 ms 15
NV Write Cycle Time tWR 4 10 ms 0°C to 70°C 15
SCL Clock Frequency fSCL 0 400 KHz Fast Mode 15
SCL Clock Frequency fSCL 0 100 KHz Standard Mode 15
Bus Free Time Between a STOP and START Condition tBUF 1.3 µs Fast Mode 15
Bus Free Time Between a STOP and START Condition tBUF 4.7 µs Standard Mode 15
Hold Time (Repeated) START Condition tHD:STA 0.6 µs Fast Mode 15
Hold Time (Repeated) START Condition tHD:STA 4 µs Standard Mode 15
Low Period of SCL Clock TLOW 1.3 µs Fast Mode 15
Low Period of SCL Clock TLOW 4.7 µs Standard Mode 15
High Period of SCL Clock THIGH 0.6 µs Fast Mode 15
High Period of SCL Clock THIGH 4 µs Standard Mode 15
Setup Time for a Repeated START Condition tSU:STA 0.6 µs Fast Mode 15
Setup Time for a Repeated START Condition tSU:STA 4.7 µs Standard Mode 15
Data Hold Time tHD:DAT 0 0.9 µs Fast Mode 15
Data Setup Time tSU:DAT 100 ns Fast Mode 15
Data Setup Time tSU:DAT 250 ns Standard Mode 15
Rise Time of Both SDA and SCL Signals tR 300 ns Fast Mode 15
Rise Time of Both SDA and SCL Signals tR 1000 ns Standard Mode 15
Fall Time of both SDA and SCL Signals tF 300 ns Fast Mode 15
Setup time for STOP Condition tSU:STO 0.6 µs Fast Mode 15
Setup time for STOP Condition tSU:STO 4 µs Standard Mode 15
Capacitive Load for each Bus Line Cb 400 pF 15
Input Capacitance CI 5 pF 15
I/O Capacitance CI/O 10 pF 13

CAD (KiCad official)

  • Symbol: DS1621S+T&R
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: ds1621s-t-r-etched.step / ds1621s-t-r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ds1621s-t-r.step / ds1621s-t-r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices Inc Maxim Integrated datasheet (16 pp, sha256 faa68e65a7b2f8f0, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF